Intel launches six innovative FPGA platforms to broaden FPGA product range

Intel's Programmable Solutions Group (PSG) is expanding its FPGA product lineup with the launch of six innovative programmable platforms catering to diverse customer needs and workloads. Among these releases, Intel introduces a new sub-family within the Agilex 5-series, the Agilex 3 series, and the all-new Agilex.

The standout feature in today's announcement is the Intel Agilex 3 FPGA series, designed for power and cost optimization in compact form factors. This family comprises the Agilex 3 B-series FPGAs, which offer higher I/O density in compact form factors compared to Intel Max 10 FPGAs. These are specifically optimized for board and system management, including applications in server platform management.

On the opposite end of the Agilex 3 spectrum, we find the C-series FPGAs. Engineered to deliver additional capabilities, these FPGAs are suitable for a wide range of complex programmable logic devices (CPLD) and FPGA applications across various industries. Intel indicates that the Agilex 3-series FPGAs will soon be available, though the exact release date is not disclosed.

Another notable addition is the Intel Agilex 5 FPGA E-series, built on the 2nd Generation Hyperflex FPGA architecture and tailored for embedded edge applications, offering high-performance efficiency. Manufactured in-house using Intel's 7nm manufacturing technology, these FPGAs claim to deliver 1.6 times higher performance per watt compared to competitors using a 16nm-class process technology, possibly referring to Xilinx's FPGAs in this category. Moreover, this FPGA series incorporates an AI tensor block, previously exclusive to Intel's premium programmable parts, making it a compelling solution for edge AI tasks. A sampling of Agilex 5 E-series parts with design software is set to begin in Q1 2024, and a system simulator for these FPGAs will be available in the cloud in late 2024.

Intel also disclosed the shipment commencement of its Intel Agilex 7 FPGAs featuring the R-Tile chipset. These FPGAs boast a PCIe 5.0 interface with the CXL protocol, enabling rapid deployment of programmable accelerators for tasks benefiting from higher bandwidth and lower latencies.

In addition to the FPGA releases, Intel shared that the first commercial product based on its F2000X infrastructure processing unit platform is now being shipped. The Napatech F2070X IPU, equipped with two 100 GbE ports and powered by the Agilex AGFC023 FPGA and an Intel Xeon D SoC, marks a significant milestone.

Completing the array of new introductions is the Nios V/c compact microcontroller. This soft-core IP, based on the RISC-V architecture, can be programmed using Intel's Quartus Prime Pro software.