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Learn the difference between FPGA and ASIC in 15 minutes

Date: Nov 12, 2020

Click Count: 4250

FPGA is about to replace ASIC, this is the slogan that FPGA manufacturers have been shouting for more than ten years. However, the FPGA market share has taken up a lot, and ASIC is still having fun. What is the difference between FPGA and ASIC? FPGAKey will analyze in detail for everyone.

1. Introduction

FPGA, namely Field Programmable Gate Array, is a product of further development on the basis of programmable devices such as PAL, GAL, and CPLD. It emerged as a semi-custom circuit in the field of application-specific integrated circuits (ASIC), which not only solves the shortcomings of custom circuits but also overcomes the shortcomings of the limited number of gate circuits of the original programmable devices. 

It is the main hardware platform of today's digital system design. Its main feature is that it is completely configured and programmed by the user through software, so as to complete a specific function, and it can be repeatedly erased. When modifying and upgrading, there is no need to change the PCB circuit board, just modify and update the program on the computer, making the hardware design work into software development work, shortening the system design cycle, improving the flexibility of implementation, and reducing the cost.

ASIC basic architecture.jpg

ASIC, or application-specific integrated circuit, is an integrated circuit designed for a special purpose. Refers to integrated circuits designed and manufactured in response to specific user requirements and specific electronic system needs. ASIC is characterized by the needs of specific users, ASIC is divided into full customization and semi-customization. The highlight is dedicated, tailor-made so the execution speed is faster. The one-sentence summary is that chips are not available on the market. Fruit's A-series processors are typical ASICs.

2. FPGA is reusable

FPGA adopts the concept of LCA (Logic Cell Array), which includes three parts: configurable logic module CLB, output-input module IOB and internal wiring. A field-programmable gate array (FPGA) is a programmable device. FPGA uses a small look-up table (16×1RAM) to implement combinational logic. Each look-up table is connected to the input of a D flip-flop, and the flip-flop drives other logic circuits or I/O to form a combination. 

The logic function can also realize the basic logic unit module of the sequential logic function. These modules are connected to each other or I/O modules by metal wires. FPGA logic is realized by loading programming data into the internal static storage unit. The value stored in the memory unit determines the logic function of the logic unit and the connection between modules or between modules and I/O, and finally determines The functions that FPGA can realize.

Features of FPGA:

When powering up, the FPGA chip reads the data in EPROM into the on-chip programming RAM. After the configuration is completed, the FPGA enters the working state. After a power failure, the FPGA is restored to a blank, and the internal logic relationship disappears. Therefore, the FPGA can be used repeatedly. In theory, FPGA allows unlimited programming.

The programming of FPGA does not need a dedicated FPGA programmer, only general EPROM, and PROM programmers.

There are abundant flip-flops and I/O pins inside FPGA.

Fast finished products can be modified to correct errors in the program and cheaper cost.

The user does not need to intervene in the layout and process of the chip, and can change its logic function at any time, which is flexible in use.

3. ASIC is for VIP services

ASIC is customized, specifically divided into full customization and semi-customization.

Fully customized design can achieve the smallest area, the best wiring layout, the best power consumption speed, and get the best electrical characteristics. Features: Exquisite workmanship, high design requirements, long cycle, and expensive design costs.

Semi-custom design methods are divided into standard cell-based design methods CBIC and gate array-based design methods. Semi-customization is mainly suitable for small batch digital circuit design with a short development cycle, low development cost, low investment, and low risk.

The characteristics of ASIC are:

Facing the needs of specific users, ASIC has the advantages of smaller size, lower power consumption, improved reliability, improved performance, enhanced confidentiality, and cost reduction compared with general integrated circuits during mass production.

ASIC requires a long development cycle, and the risk is high. Once there is a problem, the entire film will be scrapped, so small companies can no longer play it.

4. The design process of the two

The complete FPGA design process includes functional description, circuit design and input, functional simulation, synthesis optimization, post-synthesis simulation, implementation and placement and routing, timing simulation, board-level simulation, and verification, debugging, and loading configuration.

FPGA and ASIC design flow.jpg

The ASIC design process (digital chip) includes function description, module division, module code input, module-level simulation verification, system integration, and system simulation verification, synthesis, STA (static timing analysis), formal verification.

In addition, in the ASIC design process, FPGA is often used for prototype verification. FPGA verification is an important part of ASIC design. After that, it is necessary to introduce the ASIC version source code, insert IO PAD, DFT, power consumption estimation, and perform other back-end processes. It can be said that 50-80% of the entire ASIC process is completed by completing FPGA verification.

Considering the design cost, FPGA is dominant in small batches, and ASIC is dominant in large batches.

FPGA itself is a chip, but you can modify the internal logic connection and configuration through programming to achieve the functions you want. Realizing ASIC is like starting from a blank sheet of paper. You have to have the code, then synthesize, then place and route, and then tape out the GDSII.

5. Specific speed

With the same process and design, the speed on FPGA should be slower than that on ASIC. Because the FPGA is based on a general structure, that is, LUT (lookup table), it can implement adders, combinational logic, etc., and ASIC, the general adder is the adder, and the comparator is the comparator, the FPGA structure Versatility will inevitably lead to redundancy; in addition, as the basic unit of FPGA is LUT (LUT composes SLICE, SLICE composes CLB-this is the structure of Xilinx), for this large design, if one LUT cannot be realized, two LUTs must be used. If a SLICE cannot be implemented, CLB must be used. Different structures are in specific positions, and the interconnection between signals, resulting in wire delay, is a non-negligible part. As for ASIC, there is no structural restriction, and it can be very close in space for a specific reality. In contrast, wire delay and cell delay should be smaller than FPGA. Of course, there is also DFF in the LUT. As a high-speed design, it usually takes a shot after a simple combinational logic operation and then does the next step.

6. Ratio size

With exactly the same structure, FPGA is far kicked by ASIC. FPGAs need to be much larger to achieve the same functions as ASICs, and the main frequency is only a fraction. Therefore, FPGA is still much larger than ASIC.

7. Power consumption

Under the same process conditions, FPGA is larger than ASIC. FPGAs, especially FPGAs based on look-up tables (LUT) and configuration element technology based on static memory (SRAM) with six transistors per cell and occupy a large amount of silicon area, consume much more power than equivalent ASICs.

8. Cost

FPGA is expensive in a single chip, and development tools and risks are basically non-existent. As for the expensive cost of ASICs and development tools, the NRE cost becomes quite expensive as the process improves. Unless your chip can be mass-produced once, the single-chip cost will be extremely expensive!

9. Other aspects

ASIC is used for large-scale projects, and FPGAs are more suitable for small projects that need to be put on the market quickly and support remote upgrades. The main advantage of FPGA technology is still a short time to market.

In terms of the advantages of ASICs, ASICs can run immediately after power-on, and there are more packaging options in terms of unit logic size, and some analog logic can also be included. In contrast, FPGA loading configuration into memory takes time, so it cannot work immediately. In addition, FPGA packaging is also more complicated.

In addition, FPGA also includes interface I/O. I/O is divided into ordinary I/O and high-speed I/O. High-speed I/O supports such as high-speed SERDES, which is used to implement high-speed interfaces such as XAUI and PCI-E. The interface is often several Gbps to more than 10Gbps. In addition, a wide variety of hard-core IP is also a differentiated competitive weapon for FPGA vendors, such as PowerPC, ARM, and other hard-core IP. So as to form a CPU+FPGA integrated processing platform integrating programmability and reconfiguration. Therefore, relatively speaking, although FPGA has a history of 20 to 30 years, its basic architecture has not changed much.

10. Positioning of the two

The use of FPGA and ASIC products should be selected according to product positioning and design needs. ASIC products are suitable for particularly large-scale designs, such as CPU, DSP, or multi-layer switching chips, or are applied to mature technology and very low-profit margins. Products, such as household appliances and other consumer appliances, or general-purpose devices such as RAM and PHY for a large number of applications. FPGA products are suitable for products with moderate design scale, product requirements to quickly occupy the market, or product design with flexible characteristics, such as PDH, SDH devices below 2.5G, and most interface conversion chips. Of course, the specific use of which product to design requires the designer to fully consider his product positioning to decide.

11. The two are merging with each other

The most obvious is that FPGAs have begun to be integrated into processors, and programmable ASICs have also begun to emerge. As SoC becomes mainstream, the boundary between the two is not so obvious.

12. Finally, I will give you an explanation from netizens on FPGA faster than ASIC

FPGA LUT and other resources have been fixed, you need it or not, no more, no less.

In ASIC theory, every resource such as CELL or IP you use can be manually placed for optimization.

There are two disadvantages of FPGA resource fixation:

Disadvantage 1: The resources that can be used are fixed, and they are not large-scale. The production logic across regions will degrade the timing. In fact, you can't put the logic as close as possible. Placing the logic close can reduce the delay on the line and increase the speed. You can squeeze all the ASIC cells together (without violating DRC).

Disadvantage 2: Your size is fixed. Whether you use 1 door or 10W doors, this fixed LUT is for you to use. If your logic is very small and FPGA is very large, your signal may travel a long distance from IO to logic, and this will take time. In an extreme example, you come in from the upper IO, and your logic is in the lower part. This line is too long.

In addition, you can hardly move the FPGA wiring.

In ASIC, you can directly widen the metal line, such as double the width of the clock line, reset line, and so on. The width of the metal line becomes larger and the delay on the line becomes smaller, which is also helpful for speed.

There are also ASIC libraries generally including high-performance cells, low-power cells, etc. In the critical path, in order to improve timing, you use high-performance cells (high power consumption). In general paths, the timing is relatively loose, and low-power cells (low performance) are often used. Once you choose the FPGA, you only have what he gave you, and you didn't choose.

ASIC can also use a useful skew to increase the speed, which means more methods than FPGA.

In general, it's just like GPU and CPU. The GPU can process images very fast, but let the GPU process other things, and the GPU means it's a stall. The CPU can handle many calculations and can also process images, but it is slow. Once you are for a certain purpose (ASIC) you can achieve this goal without any discipline or offline. If you want to take into account multiple aspects (FPGA), you can't be the best in every aspect, you have to trade-off.

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