Design of FPGA-based laboratory reconfigurable signal source

Direct digital frequency synthesis technology (DDS) is a new type of frequency synthesis method that has developed rapidly in recent years. It introduces advanced digital processing theory and methods into the field of signal synthesis, and directly generates signals of various frequencies by controlling the speed of phase change. .

The basic working principle and design process of the signal generator based on the direct frequency synthesis technology DDS are introduced, and the design of the signal generator with adjustable waveform, frequency and amplitude is realized with the single chip microcomputer and FPGA as the core. After testing and

verification, the signal generator achieved ideal results and met the design requirements.

1 Direct digital frequency synthesis technology

Direct digital frequency synthesis technology (DDS) is a new type of frequency synthesis method that has developed rapidly in recent years. It introduces advanced digital processing theory and methods into the field of signal synthesis, and directly generates signals of various frequencies by controlling the speed of phase change. . The basic principle of DDS is shown in Figure 1. The phase of a sine function with unit amplitude is divided into 2N points within 2π radians, and the sine function value of each corresponding point is obtained, which is expressed by D-bit binary numbers and written into ROM. A so-called sine table. Under the control of a high-speed and stable reference clock, the sine function value corresponding to each phase is sequentially read out, that is, the sampled sine discrete signal is obtained, and the required analog signal is obtained by D/A conversion. The frequency of the output signal can be controlled by changing the input clock frequency .

2 Overall system design

The system design is mainly composed of the main controller module, FPGA module, D/A conversion module, filter module, amplitude modulation module, key input module, power amplification module and liquid crystal display module. The system block diagram is shown in Figure 2. The STC89C51 single-chip microcomputer is used as the main controller of the system; the FPGA module realizes the storage and output of the waveform data; the D/A conversion module converts the waveform data into an analog quantity. The liquid crystal display is used to display the waveform, amplitude, frequency, etc.

3 Main hardware circuit design of the system

3.1 Main controller circuit design

The main controller adopts AT89C51 single-chip microcomputer, the system uses bus technology, so that only a small amount of interface and IO resources of the single-chip microcomputer can be used to build the entire system, making the hardware and software design more convenient and also conducive to expansion.

3.2 FPGA realization circuit design of DDS

The DDS system includes phase increment register, phase accumulator, address register, waveform memory, clock multiplier and address generation module. All internal modules are written in Verilog language or call the existing lpm library file in Quartus II. The top-level design of the system uses schematics to connect the modules. When the waveform data in the waveform memory is changed, the output waveform is also changed, and the sine wave, square wave, and triangle wave can be output through the waveform selection buttons.

3.4 Power amplifier module

Because the power of the output signal is small, there will be greater distortion when the output is loaded, and the capacity with load is poor. It is necessary to consider the power amplification to amplify the output signal. The power amplification in the design is realized by the power amplifier chip TDA2030A. TDA2030A is a mono power amplifier IC produced by STMicroelectronics. The IC is compact, large in output power, small in quiescent current, large in dynamic current, and strong in load capacity, which can drive 4 ～16 Ω load, in some cases can drive 2 Ω or even 1.6 Ω low resistance load, and cost-effective.

3.5 FPGA realization circuit design of DDS

The DDS system includes phase increment register, phase accumulator, address register, waveform memory, clock multiplier and address generation module. All internal modules are written in Verilog language or call the existing lpm library file in Quartus II. The top-level design of the system uses schematics to connect the modules. When the waveform data in the waveform memory is changed, the output waveform is also changed, and the sine wave, square wave, and triangle wave can be output through the waveform selection buttons.

3.6 D/A conversion and amplitude modulation circuit

As shown in Figure 5, the output of the waveform storage ROM is converted to an analog signal through a D/A conversion circuit, amplitude control is implemented through an algorithm, and independent keys are set to perform fine adjustment, and then filtered through a filter circuit to obtain the desired waveform.

3.7 Power amplifier module

Because the power of the output signal is small, there will be greater distortion when the output is loaded, and the capacity with load is poor. It is necessary to consider the power amplification to amplify the output signal. The power amplification in the design is realized by the power amplifier chip TDA2030A. TDA2030A is a mono power amplifier IC produced by STMicroelectronics. The IC is compact, large in output power, small in quiescent current, large in dynamic current, and strong in load capacity, which can drive 4 ~16 Ω load, in some cases can drive 2 Ω or even 1.6 Ω low resistance load, and high cost performance, the specific circuit shown in Figure 6.

4 Software design

The software design is written in C language. The software is mainly composed of main program, LCD subprogram and button subprogram. After the system is powered on, the function of the main program is mainly to complete the system initialization, including the initialization of parameters such as liquid crystal, frequency and amplitude, update the display digits, scan the keys cyclically, set the frequency amplitude according to the key input, and set the amplitude control word. The directional DAC outputs the amplitude control word and writes the frequency control word to the FPGA through the input of the frequency control word, so as to achieve the purpose of changing the frequency and amplitude of the output waveform and displaying it on the liquid crystal display.

5 Conclusion

The system uses FPGA to realize the DDS circuit, and AT89C51 as the main controller. It realizes a sine wave, square wave, and triangle wave signal generator with an output frequency range of 1 Hz to 10 MHz. The amplitude and frequency can be adjusted. The minimum step The advancing frequency can reach 1 Hz. The test results show that the design has the characteristics of frequency bandwidth, high accuracy, stable performance, low cost and friendly operation interface. As long as the waveform generator designed in this way changes the data of the ROM in the FPGA, DDS can generate arbitrary waveforms, which increases the design flexibility, reduces the complexity of the circuit, reduces the circuit design time and possible errors, has Higher cost performance.