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Design of DDS signal generator based on FPGA and virtual instrument

Date: Jul 10, 2020

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Abstract: Combining virtual instrument technology with FPGA technology, a DDS arbitrary waveform signal generator with controllable frequency is designed. On the basis of expounding the working principle and circuit structure of direct digital frequency synthesis technology, the functions and structure of the monitoring panel of the virtual instrument of the host computer and the function of each modular circuit of the FPGA device of the lower computer to realize the DDS function are introduced respectively. After design and circuit testing, the output waveform meets the technical requirements, and the work is stable and reliable.

The signal generator is a commonly used signal source, which is widely used in modern electronic technology fields such as communication, measurement, and scientific research. The core technology of the signal generator is frequency synthesis technology, the main methods are: direct analog frequency synthesis, phase-locked loop frequency synthesis (PLL), direct digital synthesis technology (DDS). DDS is an open-loop system with no feedback link, fast output response speed and high frequency stability. Therefore, direct digital frequency synthesis technology is one of the main technologies of frequency synthesis. The main content of this article is the development of DDS signal generator using FPGA combined with virtual instrument technology.

1 Working principle of DDS

Figure 1 is a block diagram of the basic structure of DDS. Taking the sine wave signal generator as an example, the DDS technology can be used to generate sine waves of different frequencies according to requirements.

DDS basic structure block diagram.png

The DDS circuit is mainly composed of a phase accumulator, a phase modulator, a sinusoidal ROM lookup table, a DAC, and a low-pass filter. Among them, the phase accumulator is the core of the entire DDS and completes the phase accumulation function. The input of the phase accumulator, that is, the phase increment, is analyzed below.

For a sinusoidal signal generator, its output can be described by the following formula:

Sout=Asinωt=Asin(2πfoutt) (1)

Where Sout refers to the output signal waveform of the signal generator, and fout refers to the frequency corresponding to the output signal. The phase of the sinusoidal signal: θ=2πfoutt. In a clk cycle Tclk, the amount of change in phase θ is:

Change formula of phase θ.png

In order to realize the circuit with digital logic, it is necessary to digitally quantize Δθ, and cut 2π into 2N parts, so the phase increment Δθ of each clk cycle is expressed by the quantized value BΔθ:

Function formula.png

Where θk-1 refers to the phase value of the previous clk cycle.

It can be seen from the above derivation that as long as the quantized value of the phase is simply accumulated, the current phase value of the sinusoidal signal can be obtained, and the quantized value of the phase increment used for accumulation is BΔθ (also called frequency control word) Determines the output frequency fout of the signal and presents a simple linear relationship. Direct digital synthesizer DDS is a digitally controlled frequency synthesizer designed based on the above principles.

Essentially, DDS is a multi-bit counter that runs at a constant high frequency. When overflowing, the counter step size is set by using a multi-bit control word to allow the counter to cross zero. The high-order bits of the counter are used to address the storage device, which maintains a digital record of one waveform period generated. Each time the high-frequency clock advances by one unit, the counter will step once, the memory will also generate a new address word, and the new waveform data value will be sent to the DAC.

DDS has three main advantages:

1) The frequency accuracy of the output signal can reach the level of the crystal-controlled oscillator used as the reference signal of the generator;

2) DDS generator can generate very high frequency accuracy;

3) If there is RAM waveform memory, then DDS function generator can reproduce almost any waveform.

2 System design

The system uses LabVIEW software to complete the development of the virtual instrument of the host computer, generate sine wave, square wave, triangle wave, hand-drawn waveform and formula waveform and other waveform data, real-time display on the front panel and transmit the waveform data to the FPGA memory through the VISA serial port. The lower computer is developed by Alter's FPGA chip EP1C3T144C8, and the DDS module development is completed through the hardware design method of VHDL language software. The waveform data in the ROM is read according to the frequency control word value and sent to the D/A converter, and finally passed through low-pass filtering The filter completes the smoothing filter output.

2.1 FPGA lower computer development

The lower computer mainly completes the function of DDS digital synthesizer, adopts EP1C3T144C8 chip of Ahera Company, it has 104 I/O ports that can be configured by the user, and is implemented in QuartusⅡ development tool using VHDL language.

The direct digital synthesizer consists of 3 parts, as shown in Figure 5.

Figure 5 DDS digital synthesizer top schematic file.png

among them:

1) As a 32-bit data adder, ADDER32B provides the frequency value of controllable step;

2) REG32B acts as a 32-bit shift register and forms an accumulator together with ADDER32B, and feeds back the received 32-bit data to ADDER32B to complete the step using the external port F as the keyed frequency word (that is, as mentioned above);

3) The ROM is used to read the waveform data of the memory, and the 10-bit waveform data in the memory is read according to the step address and sent to the DA converter.

3 DDS signal generator result analysis

Fig. 6 is a simulation waveform. It can be seen that for different values given by different frequency control words F, the step change corresponding to the sampling point of each clock output is different. Fig. 7 uses the test tool SignalTap II (embedded logic analyzer) that comes with Quartus Ⅱ to analyze the design results, as shown in Fig. 7 is the sine signal generated when the F-key frequency word is set to 16H. 

4 Conclusion

In this paper, the DDS signal generator using LabVIEW virtual instrument technology combined with FPGA technology is used to complete the design and editing of traditional instruments on the computer by using the powerful functions of the computer, and the data is transmitted through the communication interface to achieve the output of different waveforms. Through system simulation and actual testing, the results show that the DDS signal generator can not only produce an ideal output signal, but also has a high degree of integration. It has the advantages of good stability and strong expansibility.


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