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Design of Automotive Infotainment System Based on FPGA Coprocessor

Date: Aug 05, 2020

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From this article you will get more information about how to integrate FPGA coprocessors into hardware and software architectures to meet high-performance processing requirements, flexibility requirements, and cost reduction goals.

Design of Automotive Infotainment System Based on FPGA Coprocessor

High-end automotive infotainment systems that integrate data communications, local services, and video entertainment functions require high-performance programmable processing technology support. Integrating FPGA coprocessors into mainstream automotive infocomm system architecture is the most ideal solution. This article puts forward the requirements of automotive entertainment systems, discusses mainstream system architectures, and introduces how to integrate FPGA coprocessors into hardware and software architectures to meet high-performance processing requirements, flexibility requirements, and cost reduction goals.

Entertainment electronics is becoming the main aspect of differentiation between luxury cars, thus driving the rapid development of its performance and functions. How to compromise between performance, cost and flexibility requirements is a challenge faced by design engineers. High-end applications include satellite radio, rear seat entertainment, navigation, various types of audio playback, speech synthesis and recognition, and other new applications.

The core technology used in automotive entertainment systems is essentially different from traditional automotive applications. Different from other areas of automotive electronics, these entertainment applications are used every day, and their needs are constantly changing. In addition, outdated entertainment systems will become a major obstacle to new car sales, and will affect car resale and rental prices.

Technical requirements for car entertainment system

Traditional automotive electronics are driven by comprehensive standardization with longer product life, wider temperature range, and low cost requirements. In-vehicle entertainment systems must basically meet these requirements. Design engineers not only need to design long-life systems, but also need to be able to adapt to the rapid development of system functions. These requirements require strong flexibility and performance, which cannot be provided by the traditional application-specific standard product (ASSP) based system architecture.

The basic architecture of the car entertainment system designed now can support flat panel displays, and can display dynamic maps and car information through a graphical human-machine interface. Around these architectures are highly standardized microcontrollers, various standard interfaces, and simple hardware accelerators that support low-end graphics processing. This architecture can meet the mid-level entertainment system requirements of the automotive market at a very low cost, and can also be extended to high-end applications to meet the requirements of the top luxury automotive market. Video image processing and communications are typical top-level application examples. The various standards supporting these applications include MPEG2, MPEG4 and H.26 for video, as well as GSM/EDGE, WCDMA, 1XEVDO, satellite radio, satellite TV, digital video broadcasting, and WiFi for communications. These standards all rely on the continuous development of A variety of signal processing algorithms, these algorithms require particularly high programmable processing performance.

There are currently three semiconductor technologies that can be used to implement these highly complex algorithms. These three technologies are Programmable Digital Signal Processor (DSP), ASSP, and Field Programmable Gate Array (FPGA). DSP is a high-performance programmable processor, specially designed for signal processing. DSP processor has high flexibility, low power consumption and high cost performance, but it has no hardware acceleration function and cannot provide today's advanced image processing and wireless communication algorithms. The required computing power; usually the ASSP with a DSP processor can provide optimized solutions for simple video or communication standards, but cannot be programmed to adapt to different standards; and FPGAs not only have high processing performance, but also programmable, So it can meet a variety of applications and standard requirements. Unlike the other two technologies, the flexibility and performance of FPGAs can meet the requirements of all potential algorithms.

Application of FPGA coprocessor

The basic information communication architecture mentioned above requires additional processing chips to handle high-end applications. These chips are generally ASICs and ASSPs. They are integrated with the processor through a memory or video processing bus to become a specific application coprocessor. It is a very good method to replace this specific application hardware with FPGA. The application that integrates FPGA and processor is called FPGA co-processing. This way of using FPGAs can download new application-specific accelerators to the FPGA as required to assist in the completion of any high-performance applications. This concept is widely used in advanced military multi-standard radio equipment, commonly referred to as software radio (SDR) technology. Using SDR technology, a radio device can automatically adapt to different radio standards with a simple button, which not only helps the device adapt to future applications, but also reduces the number of idle custom processors when performing different tasks. This software radio technology can also be used for in-vehicle communications and video applications.

The flexibility of FPGAs in video processing and wireless connectivity can also save equipment costs and increase the value of the system. The current basic architecture requires ASSP to support each new video codec or wireless standard. Replacing multiple ASSPs with one FPGA can reduce the number of configurations and maintenance that must be made during the life of the car. Extending the basic architecture of in-car entertainment systems to include FPGAs can provide a programmable single high-end platform to cover a wider range of video and wireless standards and performance. This method is also suitable for advanced car entertainment system architecture.

Delphi Delco Electronic Systems released an example of advanced automotive entertainment system architecture. The platform uses a standard SH-4 microprocessor and a Hitachi HD6404 "Amanda" ASIC device, which provides 80% of the basic functions required by the mid-level automotive market. The system provides a general-purpose control processor with a standard API layer, which can abstract hardware peripherals and coprocessors. ASIC provides basic peripheral device functions and an integrated graphics processor. This graphics processor can support interactive graphics and extended functions, but cannot provide video codec or other DSP functions. The system provides the basic functions required by all entertainment equipment, but still requires additional ASIC or ASSP to complete video encoding and decoding and wireless communication.


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