Application areas of FPGA and processor core technology

FPGAs provide an almost unlimited platform for any digital function, and can be implemented using logical expressions implemented through lookup tables of various widths. Since its inception, it has provided unprecedented flexibility, while their uniformity and array structure make them early adopters of the latest manufacturing nodes.

Although always at the forefront of semiconductor technology, performance is still a limiting factor for architectures that rely on increasingly complex routing patterns and clock structures; it is for this reason that vendors first use hard-wired intellectual property (IP) blocks to achieve Key features.

The endless demand for higher performance and optimal power consumption has prompted FPGA vendors to integrate more and more fixed-function IP into their products. Although stalwart may think that this is an erosion of the core advantages of FPGA technology, it actually provides access to supplementary functions that are difficult or difficult to implement in the logic structure.

One of the core markets for high-end FPGAs has always been telecommunications; here, performance is the key and cost can be secondary. To meet this demand, FPGAs now integrate a large number of IPs for data paths, such as high-speed Ethernet, as well as other serial transceivers, and the most recent optical interfaces. They are adjacent to other performance-critical functions (such as PLL and DSP modules). The ability to add soft-core processors to handle control path functions means that large FPGAs are still very popular in this area, and are generally superior to ASICs.

Although soft cores can solve many tasks, especially in the latest and fastest FPGAs, they are still limited and may not be suitable for other tasks where performance is important. Therefore, somewhat naturally, the expansion of IP integration has seen the introduction of "hard" processor cores; this concept can only be fully realized after many iterations, but it is now having a major impact in many application areas.

Early attempts to embed hard-core processor cores in FPGAs failed to spark interest or innovative technology across the industry: too much, too fast, maybe. The entire industry has returned to the soft-core option, but soon it will be found that embedded processors do exist in the market; it only needs the correct solution. It can be said that the result proved to be ARM.

Many FPGAs today offer embedded ARM cores and soft core options for obvious reasons; performance is guaranteed. In addition, the ability to expand the hard core through hardware acceleration in the FPGA architecture has opened up more application areas, and FPGA vendors are now keen to explore these areas.

SoC

Conceptually, FPGA vendors integrate logic structures and hard IP into a system-on-chip (SoC) approach, a term widely used by processor vendors. Integrate other functions. This includes processors that provide configurable logic, such as Cypress's PSoC series. In terms of performance, embedded processor subsystems are not only suitable for high-end products; Altera now offers ARM-based SoC solutions in its high-performance Stratix, mid-range Arria, and low-cost Cyclone series.

From the system level, including the processor subsystem in the FPGA does not need to physically dominate it. Figure 1 shows Altera's Arria V, which clearly shows the hard processor system (HPS) based on the ARM Cortex-A9 MPCore subsystem, which occupies only a small portion of silicon. This is reflected in Figure 2, the block diagram of the low-cost Cyclone V, which also integrates HPS.

                                  Figure 1: Altera Arria V series mid-range SoCs use vendor hard-core processor systems (HPS).

                                    Figure 2: Altera's low-cost Cyclone V also has HPS function

In this configuration, each core contains 32 KB of L1 instruction cache and 32 Kbytes of L1 data cache, single-precision and double-precision floating-point units, and NEON media engine, with CoreSight debugging and tracing capabilities. It also integrates another 512 KB shared secondary cache, and 64 KB of temporary RAM. Includes a range of memory and general-purpose interfaces-up to 134 general-purpose I/O. Importantly, HPS and FPGA can work independently, but the high-bandwidth system interconnection built by using ARM's AMBA AXI bus bridge remains tightly coupled, which makes HPS Have access to the FPGA architecture and vice versa. Both bridges comply with the AMBA AXI-3 standard. A dedicated 32-bit configuration port allows HPS to configure the FPGA at startup.

Theme changes

Like Altera, Xilinx also uses the dual-core ARM Cortex-A9 MPCore subsystem method to implement its SoC products, but unlike its competitors, it supports three families with different performance/price points and chooses to achieve a series of performance levels in one family ; Zynq-7000.

Like Altera's Cyclone V, Zynq-7000 also supports full or partial reconfiguration, allowing some FPGAs to continue to run while the rest are being reconfigured without stopping the entire system. The processor subsystem can also operate independently of the FPGA logic.

Although the first two examples use the "classic" SRAM method of the FPGA architecture and require configuration data to be loaded at power-up, there are also example processors based on Flash-based SoC devices that integrate hard cores to provide more "instant start" use cases, such as Microsemi's SmartFusion2 series.

Unlike other SoCs introduced here, the SmartFusion2 series truly solves the problem of low power consumption. Obviously, the Cortex-M3 core mainly related to microcontroller applications is selected instead of the Cortex-A class. Provided by Altera and Xilinx, it is more suitable for application processor type use cases. At this level of integration, SmartFusion2 begins to resemble other solutions that are not generally considered FPGAs, such as Cypress's PSoC 5 series; however, with an FPGA architecture of up to 150,000 logic cells, the SmartFusion2 series retains its FPGA certificate.

In conclusion

The integration of FPGA and processor core technology has a long history and is full of history. There was little hope at first, and it might be in danger of being completely written off. Fortunately, for all developers, FPGA vendors have demonstrated a certain degree of vision to ensure their renaissance, which is largely due to the success of soft cores.

Now that the embedded hard core is firmly "embedded" in the engineer's solution toolbox, it can actually represent a complete system-on-chip for many applications. It doesn't stop there: Altera has announced that its next-generation Stratix 10 series will integrate four 64-bit ARM Cortex-A53 cores, built using Intel's Tri-Gate technology, with a truly unprecedented level of performance.

As in the past, it looks like the future of FPGA SoC will be changeable, but it may be more successful.