Date: Sep 06, 2021
Click Count: 3107
With artificial intelligence and deep learning becoming more and more popular in the market, in addition to GPUs and many unicorn companies' AI-specific chips, FPGAs are also one of the popular platforms for deep learning. This article will introduce you to 5 incredibly powerful FPGA development board, of course, the price is also ridiculously high, probably for most engineers, these belong to the high-end "toys".
RTG4-DEV-KIT is a product of Microsemi, of course, has been acquired by Microchip, this is a set of high-end customer evaluation and development platform, mainly for data transfer, serial connectivity, bus interfaces and other high-density high-performance FPGA high-speed design and other applications.
The development board uses the RT4G150 device in a ceramic package, providing 150,000 logic components with 1,657 pins, and the diagram below shows the peripheral interface function of the RTG4-DEV-KIT development board.
The main hardware functions included in the RTG4 development kit are as follows.
Two 1GB DDR3 synchronous dynamic random access memories (SDRAM)
2GB SPI Flash
One PCI Express Gen1 interface
PCIe x4 interface
One pair of SMA connectors for testing full-duplex SERDES channels
Two FMC connectors with HPC/LPC pinouts for expansion
RJ45 connector for 10/100/1000 Ethernet
USB micro-AB connector
SPI, interface for GPIO
FTDI programmer interface for programming external SPI Flash
JTAG programming interface
RVI interface for application programming and debugging
Flashpro programming interface
Embedded Trace Macro (ETM) unit interface for debugging
Dual in-line package (DIP) switches for user applications
Pushbutton switches and LEDs
Current measurement test points
The following is the hardware block diagram of the RTG4-DEV-KIT development board
The hardware block diagram also shows the complex power management system of the RTG4-DEV-KIT, with a 12V DC power supply, which is distributed to each functional part via DCDC/and LDO.
The Intel Stratix 10 Development Kit is a complete design environment containing various types of hardware and software for evaluating the functionality of Stratix 10 FPGAs. The kit can be used to develop and test PCI Express 3.0 designs with PCI-SIG compliant development boards. Memory subsystems consisting of DDR4, DDR3, QDR IV, and RLDRAM III memories can be developed and tested using these development boards. Modular and scalable designs can also be developed by connecting to FMC mezzanine cards using FPGA mezzanine card (FMC) connectors. The kit supports JESD204B, Serial RapidIO, 10Gbps Ethernet (10GbE), SONET, Common Public Radio Interface (CPRI), OBSAI, and many other protocols.
Intel Stratix 10 Development Kit Hardware Block Diagram
The main FPGA on board the development board is Intel's Stratix 10 family, which offers 2X performance and ultra-low power consumption compared to the cost of the previous generation, with several groundbreaking innovations such as the new HyperFlex™ and an architecture that meets the growing bandwidth and processing performance to meet power budgets. The embedded hardware system is based on a quad-core 64-bit ARM Cortex-A53 with Intel 14-nm Tri-Gate (FinFET) technology and hybrid 3D System-on-Chip (SiP) technology with up to 5.5 million cores and logic cells per chip, up to 96 full-duplex transceivers, and data rates up to 28.3Gbps, and is primarily used in computing and storage networking equipment, optical transport networks, broadcast, military radar, medical devices, test and measurement, and 5G wireless devices, ASIC prototypes.
Intel's new series of Stratix 10 products can be said to be very cross-generational, in addition to this series of products are also very rich in product nature, easy to choose for a variety of needs of companies.
The ADS8-V1 evaluation board is not a dedicated FPGA evaluation board, exactly, but is designed to support ADI's high-speed data conversion, and can be used as a data acquisition board when connected to a designated ADI high-speed ADC evaluation board. The FPGA on the ADS8-V1 is designed to support the highest speed JESD204B analog-to-digital converter, which acts as a data receiver, while the ADC is a data transmitter.
The ADS8-V1EBZ interface peripherals are as follows.
Xilinx Kintex Ultrascale XCKU040-3FFVA1156E FPGA
One (1) FMC + connector
One (1) FMC + connector supports twenty (20) 16Gbps transceivers
Simple USB 3.0 port interface
ADI's powerful data acquisition evaluation boards can be used in aerospace and defense, electronic surveillance and countermeasures, instrumentation and measurement, communication test equipment, signal generators (audio transmission via RF), 5G field, etc.
REFLEX CES XpressVUP-LP9P is a low configuration PCIe network processing FPGA board based on Virtex Ultrascale + VU9P FPGA, designed for networking applications such as HPC. The board provides 2 sets of DDR4, 2 sets of QDR2 + memory and 2 QSFP28 network boxes for multiple 10GbE / 40GbE / 100GbE network solutions. Its key features include PCIe Gen3 x16, Xilinx Virtex UltraScale + VU9P FPGA, two DDR4 and two QDR2 + independent groups on board, two QSFP28 fiber cages for multi-network solutions, PCIe interface with 16 lanes, 8 Gb/s link rate (Gen3), and more.
FPGA and Configuration Module
Xilinx Virtex UltraScale + 16nm FPGA: XCVU9P-L2FLGB2104E (production)
2,6 M System Logic Unit
270 Mb UltraRAM (UltraScale + provides high-density, dual-port, synchronous memory modules)
JTAG connector for external Xilinx USB cable
2x Nor Flash in dual quad SPI (x8) configuration mode
PCI Express x16 (1st, 2nd or 3rd generation)
2 x QSFP28 quad fiber cages (2 x 4 XCVR: 28 Gb/ s per link) with 10GbE / 40GbE / 100GbE support
Additional protocols supported by QSFP28 modules
Onboard DDR4, 2x group 64-bit + 4-bit ECC, 8GB total
Onboard QDR-II+, 2x storage, 18-bit, 144Mbits total
Up to 100W
Custom heat sinks available
On-board programmable PLL oscillator (Si5345), highly flexible and configurable clock generator
On-board high-precision oscillator provides clock accuracy of 20MHz-0.05ppm for Precision Time Protocol (PTP) Ethernet, synchronization protocol standardized IEEE 1588
A coaxial connector for PPS (Pulses Per Second) allows multiple electronic components to be synchronized
Notably, XpressVUP supports CAPI 2.0 on POWER9 CPU host processors (IBM) and also supports the IBM SNAP framework, which requires little FPGA expertise, and the SNAP framework allows application engineers to quickly create FPGA-based accelerated programs in a server environment. It uses the IBM CAPI 2.0 interface, which runs on standard PCIe physical lanes but has the advantage of lower latency and consistent memory sharing between the CPU and FPGA.
The NetFPGA-SUME is a collaborative project between Digilent, Cambridge University and Stanford University and is an ideal platform for high performance and high density network design.
The NetFPGA-SUME features a Xilinx Virtex-7 690T FPGA supporting 30 13.1 GHz GTH transceivers, four SFP + 10Gb/s ports, five independent high-speed memory banks built from 500MHz QDRII + and 1866MT / s DDR3 SoDIMM devices, and an eight-lane third-generation PCIe, which provides very large throughput and can support a large number of high-speed data streaming FPGA architectures and memory devices, with other features including a total of 20 transceivers on FMC and QTH expansion connectors and SATA ports on display.
The NetFPGA-SUME's primary mission is to provide students, researchers and developers with a state-of-the-art networking platform, whether learning the basics or creating new hardware and software applications, the board easily supports simultaneous wire-speed processing on four 10Gb/s Ethernet ports and allows data manipulation and processing on board.
Digilent NetFPGA-SUME features.
Xilinx Virtex-7 XC7V690T FFG1761-3
Xilinx CPLD XC2C512 for FPGA configuration
PCIe Gen3 x8 (8Gbps/channel)
Two 512Mbits Micron StrataFlash (PC28F512G18A)
Programming: Xilinx Vivado Design Suite
Three x36 72Mbits QDR II SRAM (CY7C25652KV18-500BZC)
Two 4GB DDR3 SODIMMs (MT8KTF51264Hz-1G9E1)
Micro USB connector for JTAG programming and debugging (shared with UART interface)
One Micro USB cable for programming / UART
QTH connector (8 RocketIO GTH transceivers)
Four SFP + connectors (4 RocketIO GTH transceivers) with 10Gbps support
Two SATA-III ports
User LEDs and buttons
One HPC FMC connector (10 RocketIO GTH transceivers)
One Pmod port
The power of FPGA still lies in its ultra-flexible programmability. With artificial intelligence becoming more and more popular in the market, neither GPU nor dedicated AI chips are likely to be as easy to fold and innovate for new entrants into this field as FPGAs are, and with this inherent advantage, I believe FPGAs have a long spring ahead.
FPGA Spartan-IIE Family 150K Gates 3888 Cells 357MHz 0.15um Technology 1.8V 456-Pin FBGA
FPGA CONFIGURABLE MEMORY 32MBIT Memory Type:Flash, Memory Size:32Mbit,IC Interface Type:JTAG, Parallel, Serial, Supply ...
FPGA Virtex-4 FX Family 41904 Cells 90nm Technology 1.2V 1152-Pin FCBGA
FPGA Virtex-4 FX Family 41904 Cells 90nm Technology 1.2V 672-Pin FCBGA