This website uses cookies. By using this site, you consent to the use of cookies. For more information, please take a look at our Privacy Policy.
Home > FPGA Familis > QuickLogic EclipsePlus Family

QuickLogic

QuickLogic EclipsePlus Family

EclipsePlus Family

Traditional Programmable Logic architectures do not implement arithmetic functions efficiently or effectively— these functions require high logic cell usage while garnering only moderate performance results.

The EclipsePlus Family architecture allows for functionality above and beyond that achievable using programmable logic devices. By embedding a dynamically reconfigurable computational unit, the device can address various arithmetic functions efficiently. 

FPGA Documents

Need Help?

Support

If you have any questions about the product and related issues, Please contact us.