M1A3P400-2FGG256I FPGAs Overview
Reduced Cost of Ownership
Advantages to the designer extend beyond low unit cost, performance, and ease of use. Unlike SRAMbased FPGAs, flash-based ProASIC3E devices allow all functionality to be Instant On; no external boot
PROM is required. On-board security mechanisms prevent access to all the programming information
and enable secure remote updates of the FPGA logic. Designers can perform secure remote in-system
reprogramming to support future design iterations and field upgrades with confidence that valuable
intellectual property (IP) cannot be compromised or copied. Secure ISP can be performed using the
industry-standard AES algorithm. The ProASIC3E family device architecture mitigates the need for ASIC
migration at higher user volumes. This makes the ProASIC3E family a cost-effective ASIC replacement
solution, especially for applications in the consumer, networking/ communications, computing, and
The nonvolatile, flash-based ProASIC3E devices do not require a boot PROM, so there is no vulnerable
external bitstream that can be easily copied. ProASIC3E devices incorporate FlashLock, which provides
a unique combination of reprogrammability and design security without external overhead, advantages
that only an FPGA with nonvolatile flash programming can offer.
• 600 k to 3 Million System Gates
• 108 to 504 kbits of True Dual-Port SRAM
• Up to 620 User I/Os
Reprogrammable Flash Technology
• 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS Process
• Instant On Level 0 Support
• Single-Chip Solution
• Retains Programmed Design when Powered Off
On-Chip User Nonvolatile Memory
• 1 kbit of FlashROM with Synchronous Interfacing
• 350 MHz System Performance
• 3.3 V, 66 MHz 64-Bit PCI
In-System Programming (ISP) and Security
• ISP Using On-Chip 128-Bit Advanced Encryption Standard (AES) Decryption via JTAG (IEEE 1532–compliant)
• FlashLock Designed to Secure FPGA Contents
• Core Voltage for Low Power
• Support for 1.5-V-Only Systems
• Low-Impedance Flash Switches
High-Performance Routing Hierarchy
• Segmented, Hierarchical Routing and Clock Structure
• Ultra-Fast Local and Long-Line Network
• Enhanced High-Speed, Very-Long-Line Network
• High-Performance, Low-Skew Global Network
• Architecture Supports Ultra-High Utilization
Q: Does the price of M1A3P400-2FGG256I devices fluctuate frequently?
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Q: How can I obtain software development tools related to the Microsemi FPGA platform?
The specific choice depends on personal habits and functional requirements to specifically select a more suitable match.
You can search and download through the FPGA resource channel.
Q: Where can I purchase Microsemi M1A3P400 Development Boards, Evaluation Boards,
or Cortex-M1 Flash FPGAs Starter Kit? also provide technical information?
FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board,
TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information,
you can submit feedback information, our technicians will contact you soon.
Q: How to obtain M1A3P400-2FGG256I technical support documents?
Enter the "M1A3P400-2FGG256I" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
Q: What should I do if I did not receive the technical support for M1A3P4002FGG256I in time?
Depending on the time difference between your location and our location, it may take several hours for us to reply, please be patient, our FPGA technical engineer will help you with the M1A3P400-2FGG256I pinout information, replacement, datasheet in pdf, programming tools, starter kit, etc.
Internet of Things
Total RAM Bits
Number of I/O
Number of Gates
Voltage - Supply
1.425V ~ 1.575V
-40℃ ~ 100℃ (TJ)
Package / Case
Supplier Device Package
M1A3P400 Cortex-M1 Flash Family FPGAs Datasheet