LFXP3C-3QN208C

Features

■ Non-volatile, Infinitely Reconfigurable

• Instant-on

– powers up in microseconds

• No external configuration memory

• Excellent design security, no bit stream to intercept

• Reconfigure SRAM based logic in milliseconds

• SRAM and non-volatile memory programmable through system configuration and JTAG ports

■ Sleep Mode

• Allows up to 1000x static current reduction

■ TransFR Reconfiguration (TFR)

• In-field logic update while system operates

■ Extensive Density and Package Options

• 3.1K to 19.7K LUT4s

• 62 to 340 I/Os

• Density migration supported

■ Embedded and Distributed Memory

• 54 Kbits to 396 Kbits sysMEM Embedded Block RAM

• Up to 79 Kbits distributed RAM

• Flexible memory resources: − Distributed and block memory

■ Flexible I/O Buffer

• Programmable sysIO buffer supports wide range of interfaces:

− LVCMOS 3.3/2.5/1.8/1.5/1.2

− LVTTL

– SSTL 18 Class I

− SSTL 3/2 Class I, II

– HSTL15 Class I, III

− HSTL 18 Class I, II, III

− PCI

− LVDS, Bus-LVDS, LVPECL, RSDS

■ Dedicated DDR Memory Support

• Implements interface up to DDR333 (166MHz)

■ sysCLOCK PLLs

• Up to 4 analog PLLs per device

• Clock multiply, divide and phase shifting

■ System Level Support

• IEEE Standard 1149.1 Boundary Scan, plus ispTRACY internal logic analyzer capability

• Onboard oscillator for configuration

• Devices operate with 3.3V, 2.5V, 1.8V or 1.2V power supply

FAQ

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• Q: How can I obtain software development tools related to the Lattice FPGA platform?
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• Q: How to obtain LFXP3C-3QN208C technical support documents?
• Enter the "LFXP3C-3QN208C" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
  
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• Depending on the time difference between your location and our location, it may take several hours for us to reply, please be patient, our FPGA technical engineer will help you with the LFXP3C-3QN208C pinout information, replacement, datasheet in pdf, programming tools, starter kit, etc.