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Home > FPGA Familis > LatticeECP2/M Family > LFE2M50SE-6F672C
LFE2M50SE-6F672C

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LFE2M50SE-6F672C

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$24.566 - $188 | 1 Pieces(Min. Order)

Lattice

FBGA-672

No RoHS

Obsolete

Factory Excess Stock / Franchised Distributor

FPGA - Field Programmable Gate Array

FPGA LatticeECP2M Family 48000 Cells 90nm Technology 1.2V 672-Pin FBGA Tray

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LFE2M50SE-6F672C FPGAs Overview

The LatticeECP2/M family of FPGA devices is optimized to deliver high performance features such as advanced DSP blocks, high speed SERDES (LatticeECP2M family only) and high speed source synchronous interfaces in an economical FPGA fabric. This combination was achieved through advances in device architecture and the use of 90nm technology. The LatticeECP2/M FPGA fabric is optimized with high performance and low cost in mind. The LatticeECP2/M devices include LUT-based logic, distributed and embedded memory, Phase Locked Loops (PLLs), Delay Locked Loops (DLLs), pre-engineered source synchronous I/O support, enhanced sysDSP blocks and advanced configuration support, including encryption (���S��� versions only) and dual boot capabilities. The LatticeECP2M device family features high speed SERDES with PCS. These high jitter tolerance and low transmission jitter SERDES with PCS blocks can be configured to support an array of popular data protocols including PCI Express, Ethernet (1GbE and SGMII), OBSAI and CPRI. Transmit Pre-emphasis and Receive Equalization settings make SERDES suitable for chip to chip and small form factor backplane applications. Lattice Diamond庐 design software allows large complex designs to be efficiently implemented using the LatticeECP2/M FPGA family. Synthesis library support for LatticeECP2/M is available for popular logic synthesis tools. The Diamond software uses the synthesis tool output along with the constraints from its floor planning tools to place and route the design in the LatticeECP2/M device. The Diamond design tool extracts the timing from the routing and back-annotates it into the design for timing verification. Lattice provides many pre-engineered IP (Intellectual Property) modules for the LatticeECP2/M family. By using these IP cores as standardized blocks, designers are free to concentrate on the unique aspects of their design, increasing their productivity. The Lattice FPGA - Field Programmable Gate Array series LFE2M50SE-6F672C is FPGA - Field Programmable Gate Array 48K LUTs 372 S Ser Memory DSP 1.2V 6SPD, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at FPGAkey.com, and you can also search for other FPGAs products.

Features

■ High Logic Density for System Integration

• 6K to 95K LUTs

• 90 to 583 I/Os

■ Embedded SERDES (LatticeECP2M Only)

• Data Rates 250 Mbps to 3.125 Gbps

• Up to 16 channels per device PCI Express, Ethernet (1GbE, SGMII), OBSAI, CPRI and Serial RapidIO.

■ sysDSP Block

• 3 to 42 blocks for high performance multiply and accumulate

• Each block supports – One 36x36, four 18X18 or eight 9X9 multipliers

■ Flexible Memory Resources

• 55Kbits to 5308Kbits sysMEM Embedded Block RAM (EBR)

– 18Kbit block

– Single, pseudo dual and true dual port

– Byte Enable Mode support

• 12K to 202Kbits distributed RAM

– Single port and pseudo dual port

■ sysCLOCK Analog PLLs and DLLs

• Two GPLLs and up to six SPLLs per device

– Clock multiply, divide, phase & delay adjust

– Dynamic PLL adjustment

• Two general purpose DLLs per device


■ Pre-Engineered Source Synchronous I/O

• DDR registers in I/O cells

• Dedicated gearing logic

• Source synchronous standards support

– SPI4.2, SFI4 (DDR Mode), XGMII

– High Speed ADC/DAC devices

• Dedicated DDR and DDR2 memory support

– DDR1: 400 (200MHz) / DDR2: 533 (266MHz)

• Dedicated DQS support

■ Programmable sysI/O Buffer Supports Wide Range Of Interfaces

• LVTTL and LVCMOS 33/25/18/15/12

• SSTL 3/2/18 I, II

• HSTL15 I and HSTL18 I, II

• PCI and Differential HSTL, SSTL

• LVDS, RSDS, Bus-LVDS, MLVDS, LVPECL

■ Flexible Device Configuration

• 1149.1 Boundary Scan compliant

• Dedicated bank for configuration I/Os

• SPI boot flash interface

• Dual boot images supported

• TransFR I/O for simple field updates

• Soft Error Detect macro embedded

■ Optional Bitstream Encryption (LatticeECP2/M “S” Versions Only)

■ System Level Support

• ispTRACY internal logic analyzer capability

• On-chip oscillator for initialization & general use

• 1.2V power supply


FAQ

  • Q: Does the price of LFE2M50SE-6F672C devices fluctuate frequently?
  • The FPGAkey search engine monitors the LFE2M50SE-6F672C inventory quantity and price of global electronic component suppliers in real time, and regularly records historical price data. You can view the historical price trends of electronic components to provide a basis for your purchasing decisions.
  • Q: Do I have to sign up on the website to make an inquiry for LFE2M50SE-6F672C?
  • No, only submit the quantity, email address and other contact information required for the inquiry of LFE2M50SE-6F672C, but you need to sign up for the post comments and resource downloads.
  • Q: How can I obtain software development tools related to the Lattice FPGA platform?
  • Lattice's development environment uses Diamone. These recommendations are all reference opinions. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
  • Q: Where can I purchase Lattice LFE2M50 Development Boards, Evaluation Boards, or LatticeECP2/M Starter Kit? also provide technical information?
  • FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.
  • Q: How to obtain LFE2M50SE-6F672C technical support documents?
  • Enter the "LFE2M50SE-6F672C" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
  • Q: What should I do if I did not receive the technical support for LFE2M50SE6F672C in time?
  • Depending on the time difference between your location and our location, it may take several hours for us to reply, please be patient, our FPGA technical engineer will help you with the LFE2M50SE-6F672C pinout information, replacement, datasheet in pdf, programming tools, starter kit, etc.

Application Field

  • AI

    Artificial Intelligence

  • 5G Technology

    5G Technology

  • Cloud Computing

    Cloud Computing

  • Consumer Electronics

    Consumer Electronics

  • Wireless

    Wireless Technology

  • Industrial Control

    Industrial Control

  • Internet of Things

    Internet of Things

  • Medical Equipment

    Medical Equipment

Technical Attributes

  • Number of I/Os

    372

  • Operating Supply Voltage

    1.2 V

  • Maximum Operating Temperature

    + 85℃

  • Mounting Style

    SMD/SMT

  • Package / Case

    FPBGA-672

  • Minimum Operating Temperature

    0 C

  • Packaging

    Tray

  • Factory Pack Quantity

    200

Technical Documents

  • LFE2M50 LatticeECP2/M Family Data sheet Download>>

Circuit Diagram

LFE2M50
LFE2M50

LFE2M50SE-6F672C PDF Preview

LFE2M50SE-6F672C Tags

  • Lattice LFE2M50
  • LFE2M50 development board
  • LatticeECP2/M evaluation kit
  • Lattice LatticeECP2/M development board
  • LatticeECP2/M starter kit
  • LatticeECP2/M LFE2M50
  • LFE2M50 reference design
  • LFE2M50 evaluation board
  • LFE2M50SE-6F672C Datasheet PDF

Other Authorized Distributors (Fpgakey will provide Competitive price from all franchised resource.)

  • DISTRIBUTOR
  • PART NUMBER
  • MANUFACTURER
  • DESCRIPTION
  • STOCK
  • PRICE
  • BUY
  • arrow
  • LFE2M50E-5F484C
  • Lattice Semiconductor Corporation
  • 3745
  • 1+ $52.2509
    10+ $51.5642
    50+ $50.8928
    250+ $49.6109
    500+ $48.3748
    1000+ $47.7949
    2500+ $47.2151

  • arrow
  • LFE2M50E-5FN484C
  • Lattice Semiconductor Corporation
  • 30
  • 1+ $182.7532
    10+ $180.9281
    50+ $177.3044
    100+ $172.8218

  • arrow
  • LFE2M50E-6F484I
  • Lattice Semiconductor Corporation
  • 1720
  • 1+ $76.4178
    10+ $68.7854
    50+ $45.853
    100+ $34.3927
    500+ $27.5187
    1000+ $24.5662

  • digikey
  • LFE2M50E-5FN484C
  • Lattice Semiconductor Corporation
  • IC FPGA 270 I/O 484FBGA
  • 0
  • 60+ $128.4682

  • digikey
  • LFE2M50E-5FN484I
  • Lattice Semiconductor Corporation
  • IC FPGA 270 I/O 484FBGA
  • 0
  • 60+ $154.6376

  • digikey
  • LFE2M50E-5FN672C
  • Lattice Semiconductor Corporation
  • IC FPGA 372 I/O 672FPBGA
  • 0
  • 40+ $145.1215

  • digikey
  • LFE2M50E-5FN672I
  • Lattice Semiconductor Corporation
  • IC FPGA 372 I/O 672FPBGA
  • 0
  • 40+ $171.2907

  • digikey
  • LFE2M50E-5FN900C
  • Lattice Semiconductor Corporation
  • IC FPGA 410 I/O 900FBGA
  • 0
  • 27+ $161.7746

  • digikey
  • LFE2M50E-5FN900I
  • Lattice Semiconductor Corporation
  • IC FPGA 410 I/O 900FBGA
  • 0
  • 27+ $187.9434

  • future
  • LFE2M50E-5FN484C
  • Lattice Semiconductor
  • 0
  • 60+ $106.9

  • future
  • LFE2M50E-5FN672C
  • Lattice Semiconductor
  • 0
  • 40+ $120.76

  • future
  • LFE2M50E-5FN672I
  • Lattice Semiconductor
  • 0
  • 40+ $142.53

  • future
  • LFE2M50E-6FN484C
  • Lattice Semiconductor
  • 0
  • 60+ $128.67

  • verical
  • LFE2M50E-5F484C
  • LATTICE
  • FPGA LatticeECP2M Family 48000 Cells 90nm Technology 1.2V 484-Pin FBGA
  • 0
  • 1+ $47.4200
    10+ $46.8000
    50+ $46.1900
    250+ $45.0200
    500+ $43.9100
    1000+ $43.3700
    2500+ $42.8500

  • verical
  • LFE2M50E-5FN484C
  • Lattice Semiconductor Corporation
  • 0
  • 1+ $156.5954
    10+ $155.0315
    50+ $151.9265
    100+ $148.0855

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