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Home > FPGA Familis > LatticeECP2/M Family > LFE2-20E-7FN484C-6I
LFE2-20E-7FN484C-6I

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LFE2-20E-7FN484C-6I

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LatticeECP2/M Family

The LatticeECP2/M family of FPGA devices is optimized to deliver high performance features such as advanced DSP blocks, high speed SERDES (LatticeECP2M family only) and high speed source synchronous interfaces in an economical FPGA fabric

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LFE2-20E-7FN484C-6I FPGAs Overview

The LatticeECP2/M family of FPGA devices is optimized to deliver high performance features such as advanced DSP blocks, high speed SERDES (LatticeECP2M family only) and high speed source synchronous interfaces in an economical FPGA fabric. This combination was achieved through advances in device architecture and the use of 90nm technology.

The LatticeECP2/M FPGA fabric is optimized with high performance and low cost in mind. The LatticeECP2/M devices include LUT-based logic, distributed and embedded memory, Phase Locked Loops (PLLs), Delay Locked Loops (DLLs), pre-engineered source synchronous I/O support, enhanced sysDSP blocks and advanced configuration support, including encryption (“S” versions only) and dual boot capabilities.

The LatticeECP2M device family features high speed SERDES with PCS. These high jitter tolerance and low transmission jitter SERDES with PCS blocks can be configured to support an array of popular data protocols including PCI Express, Ethernet (1GbE and SGMII), OBSAI and CPRI. Transmit Pre-emphasis and Receive Equalization settings make SERDES suitable for chip to chip and small form factor backplane applications.

The ispLEVER design tool suite from Lattice allows large complex designs to be efficiently implemented using the LatticeECP2/M FPGA family. Synthesis library support for LatticeECP2/M is available for popular logic synthesis tools. The ispLEVER tool uses the synthesis tool output along with the constraints from its floor planning tools to place and route the design in the LatticeECP2/M device. The ispLEVER tool extracts the timing from the routing and back-annotates it into the design for timing verification.

Lattice provides many pre-engineered IP (Intellectual Property) ispLeverCORE modules for the LatticeECP2/M family. By using these IP cores as standardized blocks, designers are free to concentrate on the unique aspects of their design, increasing their productivity

Features

■ High Logic Density for System Integration

• 6K to 95K LUTs

• 90 to 583 I/Os

■ Embedded SERDES (LatticeECP2M Only)

• Data Rates 250 Mbps to 3.125 Gbps

• Up to 16 channels per device PCI Express, Ethernet (1GbE, SGMII), OBSAI, CPRI and Serial RapidIO.

■ sysDSP Block

• 3 to 42 blocks for high performance multiply and accumulate

• Each block supports

– One 36x36, four 18X18 or eight 9X9 multipliers

■ Flexible Memory Resources

• 55Kbits to 5308Kbits sysMEM Embedded Block RAM (EBR)

– 18Kbit block

– Single, pseudo dual and true dual port

– Byte Enable Mode support

• 12K to 202Kbits distributed RAM

– Single port and pseudo dual port

■ sysCLOCK Analog PLLs and DLLs

• Two GPLLs and up to six SPLLs per device

– Clock multiply, divide, phase & delay adjust

– Dynamic PLL adjustment

• Two general purpose DLLs per device


■ Pre-Engineered Source Synchronous I/O

• DDR registers in I/O cells

• Dedicated gearing logic

• Source synchronous standards support

– SPI4.2, SFI4 (DDR Mode), XGMII

– High Speed ADC/DAC devices

• Dedicated DDR and DDR2 memory support

– DDR1: 400 (200MHz) / DDR2: 533 (266MHz)

• Dedicated DQS support

■ Programmable sysI/O Buffer Supports Wide Range Of Interfaces

• LVTTL and LVCMOS 33/25/18/15/12

• SSTL 3/2/18 I, II

• HSTL15 I and HSTL18 I, II

• PCI and Differential HSTL, SSTL

• LVDS, RSDS, Bus-LVDS, MLVDS, LVPECL

■ Flexible Device Configuration

• 1149.1 Boundary Scan compliant

• Dedicated bank for configuration I/Os

• SPI boot flash interface

• Dual boot images supported

• TransFR I/O for simple field updates

• Soft Error Detect macro embedded

■ Optional Bitstream Encryption (LatticeECP2/M “S” Versions Only)

■ System Level Support

• ispTRACY internal logic analyzer capability

• On-chip oscillator for initialization & general use

• 1.2V power supply


FAQ

  • Q: Does the price of LFE2-20E-7FN484C-6I devices fluctuate frequently?
  • The FPGAkey search engine monitors the LFE2-20E-7FN484C-6I inventory quantity and price of global electronic component suppliers in real time, and regularly records historical price data. You can view the historical price trends of electronic components to provide a basis for your purchasing decisions.
  • Q: Do I have to sign up on the website to make an inquiry for LFE2-20E-7FN484C-6I?
  • No, only submit the quantity, email address and other contact information required for the inquiry of LFE2-20E-7FN484C-6I, but you need to sign up for the post comments and resource downloads.
  • Q: How can I obtain software development tools related to the Lattice FPGA platform?
  • Lattice's development environment uses Diamone. These recommendations are all reference opinions. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
  • Q: Where can I purchase Lattice LFE2-20 Development Boards, Evaluation Boards, or LatticeECP2/M Starter Kit? also provide technical information?
  • FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.
  • Q: How to obtain LFE2-20E-7FN484C-6I technical support documents?
  • Enter the "LFE2-20E-7FN484C-6I" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
  • Q: What should I do if I did not receive the technical support for LFE220E7FN484C6I in time?
  • Depending on the time difference between your location and our location, it may take several hours for us to reply, please be patient, our FPGA technical engineer will help you with the LFE2-20E-7FN484C-6I pinout information, replacement, datasheet in pdf, programming tools, starter kit, etc.

Application Field

  • AI

    Artificial Intelligence

  • 5G Technology

    5G Technology

  • Cloud Computing

    Cloud Computing

  • Consumer Electronics

    Consumer Electronics

  • Wireless

    Wireless Technology

  • Industrial Control

    Industrial Control

  • Internet of Things

    Internet of Things

  • Medical Equipment

    Medical Equipment

Technical Documents

  • LFE2-20 LatticeECP2/M Family Data sheet Download>>

Circuit Diagram

LFE2-20
LFE2-20
LFE2-20
LFE2-20

LFE2-20E-7FN484C-6I PDF Preview

LFE2-20E-7FN484C-6I Tags

  • Lattice LFE2-20
  • LFE2-20 development board
  • LatticeECP2/M evaluation kit
  • Lattice LatticeECP2/M development board
  • LatticeECP2/M starter kit
  • LatticeECP2/M LFE2-20
  • LFE2-20 reference design
  • LFE2-20 evaluation board
  • LFE2-20E-7FN484C-6I Datasheet PDF

Other Authorized Distributors (Fpgakey will provide Competitive price from all franchised resource.)

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  • arrow
  • LFE2-20E-5FN484C
  • Lattice Semiconductor Corporation
  • 21
  • 60+ $43.2411
    600+ $42.7053

  • Arrow
  • LFE2-20E-5FN484C
  • Lattice Semiconductor
  • 27
  • 1+ $42.44
    25+ $37.0448
    100+ $35.2947

  • digikey
  • LFE2-20E-5FN256C
  • Lattice Semiconductor Corporation
  • IC FPGA 193 I/O 256FBGA
  • 0
  • 90+ $38.362

  • digikey
  • LFE2-20E-5FN256I
  • Lattice Semiconductor Corporation
  • IC FPGA 193 I/O 256FBGA
  • 0
  • 90+ $45.4991

  • digikey
  • LFE2-20E-5FN484C
  • Lattice Semiconductor Corporation
  • IC FPGA 331 I/O 484FBGA
  • 0
  • 60+ $43.7148

  • future
  • LFE2-20E-5FN256I
  • Lattice Semiconductor Corporation
  • 3600
  • 1+ $62.507
    3+ $57.5927
    5+ $55.4456
    10+ $52.6556
    20+ $50.0033

  • Future
  • LFE2-20E-5FN256C
  • LATTICE SEMICONDUCTOR
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  • 90+ $31.9186

  • Future
  • LFE2-20E-5FN484C
  • LATTICE SEMICONDUCTOR
  • 0
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  • Future
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  • LATTICE SEMICONDUCTOR
  • 0
  • 60+ $42.31

  • mouser
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  • Lattice
  • FPGA - Field Programmable Gate Array 21K LUTs 193 I/O DSP 1.2V -5
  • 13
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    25+ $32.5700
    100+ $31.2400

  • mouser
  • LFE2-20E-5FN484C
  • Lattice
  • FPGA - Field Programmable Gate Array 21K LUTs 331 I/O DSP 1.2V -5
  • 6
  • 1+ $42.6700
    25+ $37.1100
    100+ $35.7000

  • verical
  • LFE2-20E-5F484I
  • LATTICE
  • FPGA LatticeECP2 Family 21000 Cells 90nm Technology 1.2V 484-Pin FBGA Tray
  • 1617
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  • verical
  • LFE2-20E-5FN256I
  • Lattice Semiconductor Corporation
  • 0
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    360+ $51.4687
    720+ $49.3158
    1080+ $47.5506

  • verical
  • LFE2-20E-5FN484C
  • Lattice Semiconductor Corporation
  • 0
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    120+ $37.9247
    240+ $36.3384
    360+ $35.0377

  • Verical
  • LFE2-20E-5FN484C
  • Lattice Semiconductor
  • 27
  • 1+ $42.44
    25+ $37.0448
    100+ $35.2947

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