ISPPAC-CLK5520V-01TN100I

Features

■ 10MHz to 320MHz Input/Output Operation

■ Low Output to Output Skew (<50ps)

■ Low Jitter Peak-to-Peak(<70ps)

■ Up to 20 Programmable Fan-out Buffers

• Programmable output standards and individual enable controls - LVTTL, LVCMOS, HSTL, SSTL, LVDS, LVPECL

• Programmable precision output impedance - 40 to 70Ω in 5Ω increments

• Programmable slew rate

• Up to 10 banks with individual VCCO and GND - 1.5V, 1.8V, 2.5V, 3.3V

■ Fully Integrated High-Performance PLL

• Programmable lock detect

• Multiply and divide ratio controlled by - Input divider (5 bits) - Internal feedback divider (5 bits) - Five output dividers (5 bits)

• Programmable On-chip Loop Filter

■ Precision Programmable Phase Adjustment (Skew) Per Output

• 16 settings; minimum step size 195ps - Locked to VCO frequency

• Up to +/- 12ns skew range

• Coarse and fine adjustment modes

■ Up to Five Clock Frequency Domains

■ Flexible Clock Reference Inputs

• Programmable input standards - LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL

• Clock A/B selection multiplexer

• Programmable precision termination

■ Four User-programmable Profiles Stored in E2 CMOS Memory

• Supports both test and multiple operating configurations

■ Full JTAG Boundary Scan Test In-System Programming Support

■ Exceptional Power Supply Noise Immunity

■ Commercial (0 to 70°C) and Industrial (-40 to 85°C) Temperature Ranges

■ 100-pin and 48-pin TQFP Packages

■ Applications

• Circuit board common clock generation and distribution • PLL-based frequency generation • High fan-out clock buffer

FAQ

• Q: Does the price of ISPPAC-CLK5520V-01TN100I devices fluctuate frequently?
• The FPGAkey search engine monitors the ISPPAC-CLK5520V-01TN100I inventory quantity and price of global electronic component suppliers in real time, and regularly records historical price data. You can view the historical price trends of electronic components to provide a basis for your purchasing decisions.
• Q: Do I have to sign up on the website to make an inquiry for ISPPAC-CLK5520V-01TN100I?
• No, only submit the quantity, email address and other contact information required for the inquiry of ISPPAC-CLK5520V-01TN100I, but you need to sign up for the post comments and resource downloads.
  
• Q: How can I obtain software development tools related to the Lattice FPGA platform?
• Lattice's development environment uses Diamone. These recommendations are all reference opinions. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
• Q: Where can I purchase Lattice ISPPAC-CLK5520 Development Boards, Evaluation Boards, or ispClock 5500 Starter Kit? also provide technical information?
• FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.
• Q: How to obtain ISPPAC-CLK5520V-01TN100I technical support documents?
• Enter the "ISPPAC-CLK5520V-01TN100I" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
  
• Q: What should I do if I did not receive the technical support for ISPPACCLK5520V01TN100I in time?
• Depending on the time difference between your location and our location, it may take several hours for us to reply, please be patient, our FPGA technical engineer will help you with the ISPPAC-CLK5520V-01TN100I pinout information, replacement, datasheet in pdf, programming tools, starter kit, etc.