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Home > FPGA Familis > ISPLSI5512VE-80LF388I
ISPLSI5512VE-80LF388I

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ISPLSI5512VE-80LF388I

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Manufacturer:
Lattice
Package/Case:
BGA-272
RoHS:
-
Lifecycle:
-
Stock Resource:
Factory Excess Stock / Franchised Distributor
Product Categories:
CPLD - Complex Programmable Logic Devices
Description:
CPLD - Complex Programmable Logic Devices
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ISPLSI5512VE-80LF388I FPGAs Overview

ISPLSI 5512VE-80LF388I Lattice Semiconductor Corporation, IC CPLD 512MC 12NS 388FBGA

Features

• Second Generation SuperWIDE HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC DEVICE
— 3.3V Power Supply
— User Selectable 3.3V/2.5V I/O
— 6000 PLD Gates / 128 Macrocells
— 96 I/O Pins Available
— 128 Registers
— High-Speed Global Interconnect
— SuperWIDE Generic Logic Block (32 Macrocells) for Optimum Performance
— SuperWIDE Input Gating (68 Inputs) for Fast Counters, State Machines, Address Decoders, etc.
— Interfaces with Standard 5V TTL Devices
• HIGH PERFORMANCE E2 CMOS TECHNOLOGY
— fmax = 180 MHz Maximum Operating Frequency
— tpd = 5.0 ns Propagation Delay
— TTL/3.3V/2.5V Compatible Input Thresholds and Output Levels
— Electrically Erasable and Reprogrammable
— Non-Volatile
— Programmable Speed/Power Logic Path Optimization
• IN-SYSTEM PROGRAMMABLE
— Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality
— Reprogram Soldered Devices for Faster Debugging
• 100% IEEE 1149.1 BOUNDARY SCAN TESTABLE AND 3.3V IN-SYSTEM PROGRAMMABLE
• ARCHITECTURE FEATURES
— Enhanced Pin-Locking Architecture with SingleLevel Global Routing Pool and SuperWIDE GLBs
— Wrap Around Product Term Sharing Array Supports up to 35 Product Terms Per Macrocell
— Macrocells Support Concurrent Combinatorial and Registered Functions
— Macrocell Registers Feature Multiple Control Options Including Set, Reset and Clock Enable
— Four Dedicated Clock Input Pins Plus Macrocell Product Term Clocks
— Programmable I/O Supports Programmable Bus Hold, Pull-up, Open Drain and Slew Rate Options
— Four Global Product Term Output Enables, Two Global OE Pins and One Product Term OE per Macrocell

FAQ

  • Q: Does the price of ISPLSI5512VE-80LF388I devices fluctuate frequently?
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  • No, only submit the quantity, email address and other contact information required for the inquiry of ISPLSI5512VE-80LF388I, but you need to sign up for the post comments and resource downloads.
  • Q: How can I obtain software development tools related to the Lattice FPGA platform?
  • Lattice's development environment uses Diamone. These recommendations are all reference opinions. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
  • Q: Where can I purchase Lattice ispLSI5512VE Development Boards, Evaluation Boards, or Starter Kit? also provide technical information?
  • FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.
  • Q: How to obtain ISPLSI5512VE-80LF388I technical support documents?
  • Enter the "ISPLSI5512VE-80LF388I" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
  • Q: What should I do if I did not receive the technical support for ISPLSI5512VE80LF388I in time?
  • Depending on the time difference between your location and our location, it may take several hours for us to reply, please be patient, our FPGA technical engineer will help you with the ISPLSI5512VE-80LF388I pinout information, replacement, datasheet in pdf, programming tools, starter kit, etc.

Application Field

  • AI

    Artificial Intelligence

  • 5G Technology

    5G Technology

  • Cloud Computing

    Cloud Computing

  • Consumer Electronics

    Consumer Electronics

  • Wireless

    Wireless Technology

  • Industrial Control

    Industrial Control

  • Internet of Things

    Internet of Things

  • Medical Equipment

    Medical Equipment

ISPLSI5512VE-80LF388I Specifications

Specification Value
Memory Type EEPROM
Number of Macrocells 512
Maximum Operating Frequency 80 MHz
Delay Time 6.5 ns
Number of Programmable I/Os 100
Operating Supply Voltage 3.3 V
Maximum Operating Temperature + 105 C
Minimum Operating Temperature - 40℃
Package / Case BGA-272
Mounting Style SMD/SMT
Number of Product Terms per Macro 35
Supply Voltage - Max 3.6 V
Supply Voltage - Min 3 V

Technical Documents

Circuit Diagram

ispLSI5512VE
ispLSI5512VE
ispLSI5512VE

ISPLSI5512VE-80LF388I PDF Preview

ISPLSI5512VE-80LF388I Tags

  • Lattice ispLSI5512VE
  • ispLSI5512VE development board
  • evaluation kit
  • Lattice development board
  • starter kit
  • ispLSI5512VE
  • ispLSI5512VE reference design
  • ispLSI5512VE evaluation board
  • ISPLSI5512VE-80LF388I Datasheet PDF

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