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Home > FPGA Familis > SPLD GAL Family > GAL20V8Z-12QJN
GAL20V8Z-12QJN

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GAL20V8Z-12QJN

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$0.737 - $2 | 1 Pieces(Min. Order)

Manufacturer:
Lattice
Package/Case:
PLCC-28
RoHS:
Lifecycle:
Obsolete
Stock Resource:
Factory Excess Stock / Franchised Distributor
Product Categories:
SPLD GAL Family
Description:
SPLD GAL Family 8 Macro Cells 83.3MHz 5V 28-Pin PLCC
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GAL20V8Z-12QJN FPGAs Overview

The GAL20V8Z-12QJN , at 5ns maximum propagation delay time, combines a high performance CMOS process with Electrically Eras-able(E2) floating gate technology to provide the highest speed performance available in the PLD market High speed erase times
(<100ms) allow the devices to be reprogrammed quickly and efficiently.
The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. An important subset of the many architecture configura-tions possible with the GAL20V8Z-12QJN are the PAL architectures listed in the table of the macrocell description section. GAL20V8Z-12QJN devices are capable of emulating any of these PAL architectures with full function/fuse map/parametric compatibility.
Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition,100 erase/write cycles and data retention in excess of 20 years are specified.

Features

• HIGH PERFORMANCE E2CMOS TECHNOLOGY

— 5 ns Maximum Propagation Delay

— Fmax = 166 MHz

— 4 ns Maximum from Clock Input to Data Output

— UltraMOS Advanced CMOS Technology


• 50% to 75% REDUCTION IN POWER FROM BIPOLAR

— 75mA Typ Icc on Low Power Device

— 45mA Typ Icc on Quarter Power Device


• ACTIVE PULL-UPS ON ALL PINS


• E2 CELL TECHNOLOGY

— Reconfigurable Logic

— Reprogrammable Cells

— 100% Tested/100% Yields

— High Speed Electrical Erasure (<100ms)

— 20 Year Data Retention


• EIGHT OUTPUT LOGIC MACROCELLS

— Maximum Flexibility for Complex Logic Designs

— Programmable Output Polarity

— Also Emulates 24-pin PAL Devices with Full Function/ Fuse Map/Parametric Compatibility


• PRELOAD AND POWER-ON RESET OF ALL REGISTERS

— 100% Functional Testability

Applications

— DMA Control 

— State Machine Control 

— High Speed Graphics Processing 

— Standard Logic Speed Upgrade

FAQ

  • Q: Does the price of GAL20V8Z-12QJN devices fluctuate frequently?
  • The FPGAkey search engine monitors the GAL20V8Z-12QJN inventory quantity and price of global electronic component suppliers in real time, and regularly records historical price data. You can view the historical price trends of electronic components to provide a basis for your purchasing decisions.
  • Q: Do I have to sign up on the website to make an inquiry for GAL20V8Z-12QJN?
  • No, only submit the quantity, email address and other contact information required for the inquiry of GAL20V8Z-12QJN, but you need to sign up for the post comments and resource downloads.
  • Q: How can I obtain software development tools related to the Lattice FPGA platform?
  • Lattice's development environment uses Diamone. These recommendations are all reference opinions. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
  • Q: Where can I purchase Lattice GAL20V8 Development Boards, Evaluation Boards, or SPLD GAL Starter Kit? also provide technical information?
  • FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.
  • Q: How to obtain GAL20V8Z-12QJN technical support documents?
  • Enter the "GAL20V8Z-12QJN" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
  • Q: What should I do if I did not receive the technical support for GAL20V8Z12QJN in time?
  • Depending on the time difference between your location and our location, it may take several hours for us to reply, please be patient, our FPGA technical engineer will help you with the GAL20V8Z-12QJN pinout information, replacement, datasheet in pdf, programming tools, starter kit, etc.

Application Field

  • AI

    Artificial Intelligence

  • 5G Technology

    5G Technology

  • Cloud Computing

    Cloud Computing

  • Consumer Electronics

    Consumer Electronics

  • Wireless

    Wireless Technology

  • Industrial Control

    Industrial Control

  • Internet of Things

    Internet of Things

  • Medical Equipment

    Medical Equipment

Technical Documents

Circuit Diagram

GAL20V8
GAL20V8

GAL20V8Z-12QJN PDF Preview

GAL20V8Z-12QJN Tags

  • Lattice GAL20V8
  • GAL20V8 development board
  • SPLD GAL evaluation kit
  • Lattice SPLD GAL development board
  • SPLD GAL starter kit
  • SPLD GAL GAL20V8
  • GAL20V8 reference design
  • GAL20V8 evaluation board
  • GAL20V8Z-12QJN Datasheet PDF

Other Authorized Distributors (Fpgakey will provide Competitive price from all franchised resource.)

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