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Home > FPGA Familis > SPLD GAL Family > GAL18V10B-20LP

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GAL18V10B-20LP

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$2.100 - $13.971 | 1 Pieces(Min. Order)

Lattice

PDIP-20

No RoHS

Obsolete

Factory Excess Stock / Franchised Distributor

SPLD - Simple Programmable Logic Devices

SPLD GAL Family 10 Macro Cells 50MHz 5V 20-Pin PDIP

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GAL18V10B-20LP FPGAs Overview

The GAL18V10, at 7.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2 ) floating gate technology to provide a very flexible 20-pin PLD. CMOS circuitry allows the GAL18V10B-20LP to consume much less power when compared to its bipolar counterparts. The E2 technology offers high speed (<100ms) erase times, providing the ability to reprogram or reconfigure the device quickly and efficiently.

By building on the popular 22V10 architecture, the GAL18V10 eliminates the learning curve usually associated with using a new device architecture. The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC) to be configured by the user. The GAL18V10B-20LP OLMC is fully compatible with the OLMC in standard bipolar and CMOS 22V10 devices.

Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and functionality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.

The Lattice SPLD - Simple Programmable Logic Devices series GAL18V10B-20LP is High Performance E2CMOS PLD Generic Array Logic,SPLD - Simple Programmable Logic Devices 18 Input 10 Output 5V Low Power 20ns, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at FPGAkey.com, and you can also search for other FPGAs products.

Features

• HIGH PERFORMANCE E2CMOS TECHNOLOGY
— 7.5 ns Maximum Propagation Delay
— Fmax = 111 MHz
— 5.5 ns Maximum from Clock Input to Data Output
— TTL Compatible 16 mA Outputs
— UltraMOS Advanced CMOS Technology
• LOW POWER CMOS
— 75 mA Typical Icc
• ACTIVE PULL-UPS ON ALL PINS
• E2
CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
• TEN OUTPUT LOGIC MACROCELLS
— Uses Standard 22V10 Macrocell Architecture
— Maximum Flexibility for Complex Logic Designs
• PRELOAD AND POWER-ON RESET OF REGISTERS
— 100% Functional Testability
• APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
• ELECTRONIC SIGNATURE FOR IDENTIFICATION

FAQ

  • Q: Does the price of GAL18V10B-20LP devices fluctuate frequently?
  • The FPGAkey search engine monitors the GAL18V10B-20LP inventory quantity and price of global electronic component suppliers in real time, and regularly records historical price data. You can view the historical price trends of electronic components to provide a basis for your purchasing decisions.
  • Q: Do I have to sign up on the website to make an inquiry for GAL18V10B-20LP?
  • No, only submit the quantity, email address and other contact information required for the inquiry of GAL18V10B-20LP, but you need to sign up for the post comments and resource downloads.
  • Q: How can I obtain software development tools related to the Lattice FPGA platform?
  • Lattice's development environment uses Diamone. These recommendations are all reference opinions. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
  • Q: Where can I purchase Lattice GAL18V10 Development Boards, Evaluation Boards, or SPLD GAL Starter Kit? also provide technical information?
  • FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.
  • Q: How to obtain GAL18V10B-20LP technical support documents?
  • Enter the "GAL18V10B-20LP" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
  • Q: What should I do if I did not receive the technical support for GAL18V10B20LP in time?
  • Depending on the time difference between your location and our location, it may take several hours for us to reply, please be patient, our FPGA technical engineer will help you with the GAL18V10B-20LP pinout information, replacement, datasheet in pdf, programming tools, starter kit, etc.

Application Field

  • AI

    Artificial Intelligence

  • 5G Technology

    5G Technology

  • Cloud Computing

    Cloud Computing

  • Consumer Electronics

    Consumer Electronics

  • Wireless

    Wireless Technology

  • Industrial Control

    Industrial Control

  • Internet of Things

    Internet of Things

  • Medical Equipment

    Medical Equipment

Technical Attributes

  • Logic Family

    GAL

  • Number of Macrocells

    10

  • Maximum Operating Frequency

    62.5 MHz

  • Delay Time

    20 ns

  • Operating Supply Voltage

    4.75 V to 5.25 V

  • Supply Current

    115 mA

  • Maximum Operating Temperature

    + 75 C

  • Minimum Operating Temperature

    0 C

  • Mounting Style

    Through Hole

  • Package / Case

    PDIP-20

  • Operating Temperature

    0 C to + 75 C

  • Packaging

    Tube

  • Factory Pack Quantity

    360

  • Supply Voltage - Max

    5.25 V

  • Supply Voltage - Min

    4.75 V

Technical Documents

  • GAL18V10 Specifications SPLD GAL Family Data sheet Download>>

Circuit Diagram

GAL18V10B-20LP
GAL18V10B-20LP

GAL18V10B-20LP PDF Preview

GAL18V10B-20LP Tags

  • Lattice GAL18V10
  • GAL18V10 development board
  • SPLD GAL evaluation kit
  • Lattice SPLD GAL development board
  • SPLD GAL starter kit
  • SPLD GAL GAL18V10
  • GAL18V10 reference design
  • GAL18V10 evaluation board
  • GAL18V10B-20LP Datasheet PDF

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  • GAL18V10B-20LP
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