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Lattice

Lattice E2CMOS PLD Family

E2CMOS PLD Family

   ·IN-SYSTEM PROGRAMMABLE
   一IEEE 1149.1 Standard TAP Controller Port Programming
   一4-Wire Serial Programming Interface
   一Minimum 10,000 Program/Erase Cycles
   ·HIGH PERFORMANCE ECMOSTECHNOLOGY
   一4ns Maximum Propagation Delay
   一Fmax=250 MHz
   一3 ns Maximum from Clock Input to Data Output
   一UltraMOS°Advanced CMOS Technology
   ·3.3V LOW VOLTAGE 22V10 ARCHITECTURE
   一JEDEC-Compatible 3.3V Interface Standard
   一5V Tolerant Inputs and I/O
   一I/0 Interfaces with Standard 5V TTL Devices

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