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FPGAKey Technical Documents
Download DatasheetMAX II EPM240T100C3 devices are supported by the Altera Quartus II design software with new, optional MAX+PLUS II look and feel, which provides HDL and schematic design entry, compilation and logic synthesis, full simulation and advanced timing analysis, and device programming. Refer to the Design Software Selector Guide for more details about the Quartus II software features.
The Quartus II software supports the Windows XP/2000/NT, Sun Solaris, Linux Red Hat v8.0, and HP-UX operating systems. It also supports seamless integration with industry-leading EDA tools through the NativeLink interface.
The INTEL CPLDs series EPM240T100C3 is CPLD MAX II Family 192 Macro Cells 304MHz 0.18um Technology 2.5V/3.3V 100Pin TQFP, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at FPGAkey.com, and you can also search for other FPGAs products.
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| Specification | Value |
|---|---|
| Series | MAX II |
| Memory Type | Flash |
| Number of Macrocells | 192 |
| Maximum Operating Frequency | 304 MHz |
| Delay Time | 4.7 ns |
| Number of Programmable I/Os | 80 |
| Operating Supply Voltage | 2.5 V, 3.3 V |
| Maximum Operating Temperature | + 70 C |
| Minimum Operating Temperature | 0 C |
| Package / Case | TQFP-100 |
| Mounting Style | SMD/SMT |
| Packaging | Tray |
| Supply Current | 55 mA |
| Supply Voltage - Max | 3.6 V |
| Supply Voltage - Min | 2.375 V |
22+ $16.7844
30+ $16.5480
50+ $16.0752
110+ $15.7206
220+ $15.1296
1100+ $14.7750
2200+ $14.4204
270+ $23.7145
1+ $21.5462
1+ $20.4500
1+ $18.5800
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