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Home > FPGA Familis > Stratix GX FPGA > EP1SGX25DF672C5N

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$1274.407 - $1520.047 | 1 Pieces(Min. Order)

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Product Categories:
Embedded - FPGAs (Field Programmable Gate Array)
FPGA Stratix GX Family 25660 Cells 5000MHz 130nm Technology 1.5V 672-Pin FC-FBGA
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EP1SGX25DF672C5N FPGAs Overview

Stratix GX EP1SGX25DF672C5N devices combine highly advanced 3.1875-gigabit-per-second (Gbps) four-channel gigabit transceiver blocks with one of the industry’s most advanced FPGA architectures. Stratix GX devices are manufactured on a 1.5-V, 0.13-µm, all-layer copper CMOS process technology with 1.5- V PCML I/O standard support.

Historically, designers have used high-speed transceivers in strictly structured, line-side applications. Now, with the new gigabit transceiver blocks embedded in FPGAs, you can use transceivers in a host of new systems that require flexibility, increased time-to-market, high performance, and top-of-the-line features.

Stratix GX EP1SGX25DF672C5N devices are organized into four-channel blocks with four 3.1875 Gbps full-duplex channels per block and up to 20 channels (in five blocks) per device.

The INTEL Embedded - FPGAs (Field Programmable Gate Array) series EP1SGX25DF672C5N is FPGA - Field Programmable Gate Array FPGA - Stratix I GX 2566 LABs 455 IOs, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at, and you can also search for other FPGAs products.


Each self-contained Stratix GX gigabit transceiver block supports a variety of embedded functions and does the following:
■ Supports frequencies from 500 megabits per second (Mbps) to 3.1875 Gbps
■ Integrates serializer/deserializer (SERDES), clock data recovery (CDR), word aligner, channel aligner, rate matcher, 8B/10B encoder/decoder, byte serializer/deserializer, and phase compensation first-in first-out (FIFO) modules
■ Supports flexible reference clock generation capabilities, including a dedicated transmitter phase-locked loop (PLL) and four receiver PLLs per gigabit transceiver block
■ Supports programmable pre-emphasis, equalization, and programmable VOD settings in I/O buffers, and dynamic reprogrammability for each of these features
■ Implements XAUI physical media attachment (PMA) and physical coding sublayer (PCS) functionality for 10GBASE-X systems
■ Provides built-in Gigabit Ethernet (GigE) physical coding sublayer functionality
■ Provides individual transmitter and receiver power-down capability for reduced power consumption during non-operation
■ Includes built-in self test (BIST) capability, including embedded Pseudo Random Binary Sequence (PRBS) pattern generation and verification
■ Includes three independent loopback paths for system verification


  • mass storage systems

  • high-end consumer electronics

  • high-speed communications


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  • Q: How can I obtain software development tools related to the INTEL FPGA platform?
  • Quartus Prime Modelsim is the corresponding programming software for FPGA produced by Altera/Intel. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
  • Q: Where can I purchase INTEL EP1SGX25 Development Boards, Evaluation Boards, or Stratix GX FPGA Starter Kit? also provide technical information?
  • FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.
  • Q: How to obtain EP1SGX25DF672C5N technical support documents?
  • Enter the "EP1SGX25DF672C5N" keyword in the search box of the website, or find these through the Download Channel or FPGA Forum .
  • Q: What should I do if I did not receive the technical support for EP1SGX25DF672C5N in time?
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Application Field

  • AI

    Artificial Intelligence

  • 5G Technology

    5G Technology

  • Cloud Computing

    Cloud Computing

  • Consumer Electronics

    Consumer Electronics

  • Wireless

    Wireless Technology

  • Industrial Control

    Industrial Control

  • Internet of Things

    Internet of Things

  • Medical Equipment

    Medical Equipment

EP1SGX25DF672C5N Specifications

Specification Value
Series Stratix GX
Number of Logic Blocks 2566
Number of I/Os 455
Maximum Operating Frequency 684 MHz
Operating Supply Voltage 1.5 V to 3.3 V
Maximum Operating Temperature + 70 C
Mounting Style SMD/SMT
Package / Case FBGA-672
Distributed RAM 1.9 Mbit
Minimum Operating Temperature 0 C
Packaging Tray

Technical Documents

EP1SGX25DF672C5N PDF Preview

EP1SGX25DF672C5N Tags

  • EP1SGX25 development board
  • Stratix GX evaluation kit
  • INTEL Stratix GX development board
  • Stratix GX starter kit
  • Stratix GX EP1SGX25
  • EP1SGX25 reference design
  • EP1SGX25 evaluation board
  • EP1SGX25DF672C5N Datasheet PDF

Other Authorized Distributors (Fpgakey will provide Competitive price from all franchised resource.)

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  • avnet
  • EP1SGX25DF672C5N
  • Altera Corporation
  • 0
  • 1+ $1,520.0469
    10+ $1,488.4299
    30+ $1,449.5167
    50+ $1,381.4186
    100+ $1,342.5054
    250+ $1,313.3206
    500+ $1,274.4073

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