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Download DatasheetAltera ACEX 1K EP1K50FC484-3 provide a die-efficient, low-cost architecture by combining look-up table (LUT) architecture with EABs. LUT-based logic provides optimized performance and efficiency for data-path, register intensive, mathematical, or digital signal processing (DSP) designs, while EABs implement RAM, ROM, dual-port RAM, or first-in first-out (FIFO) functions. These elements make ACEX 1K EP1K50FC484-3 suitable for complex logic functions and memory functions such as digital signal processing, wide data-path manipulation, data transformation and microcontrollers, as required in high-performance communications applications. Based on reconfigurable CMOS SRAM elements, the ACEX 1K EP1K50FC484-3 architecture incorporates all features necessary to implement common gate array megafunctions, along with a high pin count to enable an effective interface with system components. The advanced process and the low voltage requirement of the 2.5-V core allow ACEX 1K devices to meet the requirements of low-cost, high-volume applications ranging from DSL modems to low-cost switches.
The INTEL Embedded - FPGAs (Field Programmable Gate Array) series EP1K50FC484-3 is FPGA Logic IC; Logic Type:Programmable; No. of Macrocells:249; Package/Case:484-FBGA; Leaded Process Compatible:No; Number of Circuits:2880; Peak Reflow Compatible (260 C):No RoHS Compliant: No FBGA, 484 Pin, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at FPGAkey.com, and you can also search for other FPGAs products.■ Programmable logic devices (PLDs), providing low cost system-on-a-programmable-chip (SOPC) integration in a single device
– Enhanced embedded array for implementing megafunctions such as efficient memory and specialized logic functions
– Dual-port capability with up to 16-bit width per embedded array block (EAB)
– Logic array for general logic functions
■ High density
– 10,000 to 100,000 typical gates (see Table 1)
– Up to 49,152 RAM bits (4,096 bits per EAB, all of which can be used without reducing logic capacity)
■ Cost-efficient programmable architecture for high-volume applications
– Cost-optimized process
– Low cost solution for high-performance communications applications
Artificial Intelligence
5G Technology
Cloud Computing
Consumer Electronics
Wireless Technology
Industrial Control
Internet of Things
Medical Equipment
Specification | Value |
---|---|
Series | ACEX 1K |
Number of Logic Blocks | 360 |
Number of I/Os | 249 |
Operating Supply Voltage | 3.3 V |
Maximum Operating Temperature | + 70 C |
Mounting Style | SMD/SMT |
Package / Case | FBGA-484 |
Distributed RAM | 41 kbit |
Minimum Operating Temperature | 0 C |
Operating Supply Current | 5 mA |
Packaging | Tray |
1+ $288.9800
10+ $254.9800
50+ $216.7300
100+ $197.0300
250+ $180.6100
500+ $144.4900
1+ $301.3900
10+ $241.1100
50+ $219.2000
100+ $200.9300
250+ $126.9000
500+ $120.5600
1000+ $119.0700
2500+ $117.6200
5000+ $116.2000
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