Author: DORIS Jul 23, 2020 2250
I need to add a fixed delay to a signal (pulse_out) generated inside the FPGA before outputting.
If you want to use the IODELAYE1 module, you should use ODELAY mode. But it is found that it has 3 signal input ports: IDATAIN, DATIN, ODATAIN. Which port does this signal of mine input from?
I checked the information of UG361, but I still don't know how to use it.
DORIS Posted on 2020/7/23 14:33:58
I also don't quite understand how this iodelaye1 is connected. The picture below is my own guess about the connection between ODELAY Mode and IDELAY Mode, I don't know if it is the case.
Gabriel Posted on 2020/7/23 14:35:07
Iodelay integrates idelay and odelay, and the function you mentioned should be to use odelay.
In general, idelay is used more, and idelay and odelay cannot be used at the same time. Use idatain in idelay, and then delay output to dataout. I use odelay less, and the specific pins are not very clear.
Figure1-1, the idelay you painted is wrong, it should be located between ilogic and iob, odelay is correct.
Posted on 2020/7/23 14:36:47
Gabriel Reply
Thank you for your advice. Yesterday, I tried it out for me. I used ODATAIN. It was able to delay successfully, so I didn't try any more ports.
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