For V6 GTX data transmission and reception, the code was modified on the basis of routines, and the Near end PCS closed-loop simulation was performed. There were some questions. According to the debugging situation, the received data RXDATAIN is about 13 usrclk2 clock cycles later than the sent data TX_DATA, but why is RXDATAIN always 0 during the first period of time (about 11us), and is first during the period of 11us to 15us A lot of messy data, and then gradually transfer the correct data. This situation caused some data before TX_DATA to be transmitted incorrectly.
I would like to ask how the receiving end can receive TX_DATA when the transmission starts, avoiding the vacuum period of receiving data in the first 15us?
