What is the difference between Quartus prime and Quartus II?
Posted by Juan Hsiung · On Nov 11, 2020 at 07:10 AM
2
What is the difference between Quartus prime and Quartus II?
Posted by Juan Hsiung · On Nov 11, 2020 at 07:10 AM
2
How to connect Zedboard to Vivado?
Posted by Meg Peng · On Nov 09, 2020 at 21:24 PM
2
How do zynq 7020 PS and zynq PL talk?
Posted by Leon Hidalgo · On Nov 09, 2020 at 10:57 AM
2
How to access zynq processor GPIO?
Posted by Luigi Iuliano · On Nov 09, 2020 at 07:10 AM
2
Nothing happens after programming zedboard
Posted by Ficken Bumsen · On Nov 05, 2020 at 07:14 AM
0
ZYNQ startup principle and configuration
Posted by Allen Chi · On Nov 04, 2020 at 21:00 PM
0
Zedboard USB UART port problem.
Posted by sonia touati · On Nov 04, 2020 at 14:51 PM
2
An article to analyze the ZYNQ chip architecture
Posted by sonia touati · On Nov 04, 2020 at 10:00 AM
0
Can ISE3.1 be downloaded from Xilinx?
Posted by Sylvia · On Nov 04, 2020 at 08:11 AM
3
XILINX ise cannot open the program.
Posted by sonia touati · On Nov 04, 2020 at 06:14 AM
3
How to use Xilinx FPGA to implement downsampling FIR filter?
Posted by Sylvia · On Nov 03, 2020 at 20:00 PM
1
How to get the extra pins used for fpga programming.
Posted by jamie · On Nov 03, 2020 at 08:28 AM
4
How does ACTEL's FPGA use the SDRAM kernel tool?
Posted by stephen david · On Nov 02, 2020 at 22:31 PM
1
What are the advantages of Xilinx Vivado full design license?
Posted by Ficken Bumsen · On Nov 02, 2020 at 22:04 PM
4
What is the role of actel's cpld in TI's XDS100V3 production?
Posted by Stefan Andrey · On Nov 02, 2020 at 08:37 AM
2
Posted by Philipp Zielinski · On Nov 01, 2020 at 21:18 PM
1
Boot the IBL from I2C EEPROM in custom own board.
Posted by Rodolfo Lehner · On Nov 01, 2020 at 18:54 PM
2
How to download the design project to fpga board through chipscope pro?
Posted by zana villegas · On Nov 01, 2020 at 00:00 AM
4
fpga--matrix keyboard realizes some unique key functions
Posted by Ficken Bumsen · On Nov 01, 2020 at 00:00 AM
1
How much fifo can ep4ce6 achieve.
Posted by Ficken Bumsen · On Oct 29, 2020 at 00:00 AM
0
FPGA Spartan-IIE Family 50K Gates 1728 Cells 400MHz 0.15um Technology 1.8V 208-Pin PQFP
Xilinx QFP100
Xilinx TQFP44
FPGA Spartan-XL Family 5K Gates 238 Cells 217MHz 3.3V 84-Pin PLCC
FPGA Spartan Family 10K Gates 466 Cells 166MHz 5V 144-Pin TQFP EP
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