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FPGA Design

Document Type: Books

Size: 12.61MB

Download Count: 86

Published time: 2020.06.30

Introduction

FPGA design method (2).png

In August of 2006, an engineering VP from one of Altera’s customers approached Misha Burich, VP of Engineering at Altera, asking for help in reliably being able to predict the cost, schedule and quality of system designs reliant on FPGA designs. At this time, I was responsible for defining the design flow requirements for the Altera design software and was tasked with investigating this further. As I worked with the customer to understand what worked and what did not work reliably in their FPGA design process, I noted that this problem was not unique to this one customer. The characteristics of the problem are shared by many Corporations that implement designs in FPGAs. The Corporation has many design teams at different locations and the success of the FPGA projects vary between the teams. There is a wide range of design experience across the teams. There is no working process for sharing design blocks between engineering teams.

As I analyzed the data that I had received from hundreds of customer visits in the past, I noticed that design reuse among engineering teams was a challenge. I also noticed that many of the design teams at the same Companies and even within the same design team used different design method ologies. Altera had recently solved this problem as part of its own FPGA design software and IP development process.

I worked with the top talent in Altera Engineering to develop a Best Practices Design methodology based upon Altera’s experience and the techniques used by many customers successfully in FPGA design. The resulting methodology was presented and implemented at the customer, with great success.

Through the analysis of past customer data and feedback from customers over the last 3 years, it has become clear that this challenge exists broadly in the industry. The challenge is not specific to one specific FPGA vendor; it is an industry wide challenge.

As such, I have tuned the Best practices FPGA design methodology over the last 3 years and deployed it at several customers with great success. This book captures the Best Practices FPGA design methodology and now makes it available to all design teams implementing system designs in FPGA devices.


  • XC3020-70CQ100M

    Manufacturer:Xilinx

  • Field Programmable Gate Array (FPGA)
  • Product Categories:

    Lifecycle:Any -

    RoHS: -

  • XC3020-70PC84I

    Manufacturer:Xilinx

  • FPGA XC3000 Family 1.5K Gates 64 Cells 70MHz 5V 84-Pin PLCC
  • Product Categories:

    Lifecycle:Obsolete -

    RoHS: No RoHS

  • XC420061-003

    Manufacturer:Xilinx

  • Xilinx QFP100
  • Product Categories:

    Lifecycle:Any -

    RoHS: -

  • XC2S100E-2FG456C

    Manufacturer:Xilinx

  • Xilinx BGA
  • Product Categories:

    Lifecycle:Any -

    RoHS:

  • XC6VLX365T-3FFG1759C

    Manufacturer:Xilinx

  • FPGA Virtex-6 LXT Family 364032 Cells 40nm Technology 1V 1759-Pin FCBGA
  • Product Categories: FPGAs

    Lifecycle:Active Active

    RoHS:

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