$84.18 - $1730 | 1 Pieces(Min. Order)
For product pricing customization or other inquiries
FPGAKey Technical Documents
Download DatasheetThe MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX EPM7192EGC160-20N provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz. MAX 7000S devices in the -5, -6, -7, and -10 speed grades as well as MAX 7000 and MAX 7000E devices in -5, -6, -7, -10P, and -12P speed grades comply with the PCI Special Interest.
■ 5.0-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface available in MAX 7000S devices
– ISP circuitry compatible with IEEE Std. 1532
■ Includes 5.0-V MAX 7000 devices and 5.0-V ISP-based MAX 7000S devices
■ Built-in JTAG boundary-scan test (BST) circuitry in MAX7000S devices with 128 or more macrocells
Artificial Intelligence
5G Technology
Cloud Computing
Consumer Electronics
Wireless Technology
Industrial Control
Internet of Things
Medical Equipment
Specification | Value |
---|---|
Series | MAX 7000 |
Memory Type | EEPROM |
Number of Macrocells | 192 |
Maximum Operating Frequency | 90.9 MHz |
Delay Time | 12 ns |
Number of Programmable I/Os | 124 |
Operating Supply Voltage | 5 V |
Maximum Operating Temperature | + 70 C |
Minimum Operating Temperature | 0 C |
Package / Case | PGA-160 |
Mounting Style | SMD/SMT |
Packaging | Tray |
Supply Voltage - Max | 5.25 V |
Supply Voltage - Min | 4.75 V |
1+ $1730.0962
5+ $1597.0173
10+ $1482.9446
25+ $1297.5751
1+ $173.7067
4+ $97.9800
6+ $96.6000
10+ $93.8400
20+ $91.7700
40+ $88.3200
200+ $86.2500
400+ $84.1800
1+ $321.2163
1+ $349.1748
2+ $336.6548
3+ $326.0545
5+ $317.0043
10+ $309.2221
1+ $270.2439
1+ $149.1665
1+ $114.6619
2+ $110.5385
3+ $107.0172
5+ $103.9862
1+ $483.1800
10+ $452.9800
25+ $362.3800
100+ $329.4400
250+ $301.9900
500+ $241.5900
1000+ $213.1700
Support