$8.28 - $105 | 1 Pieces(Min. Order)
For product pricing customization or other inquiries
FPGAKey Technical Documents
Download DatasheetMAX 7000A (including MAX 7000AE) devices are high-density, highperformance devices based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM based EPM7064AETC-4 devices operate with a 3.3-V supply voltage and provide 600 to 10,000 usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up to 227.3 MHz. EPM7064AETC-4 devices in the -4, -5, -6, -7, and some -10 speed grades are compatible with the timing.
The EPM7064AETC-4 architecture includes four dedicated inputs that can be used as general-purpose inputs or as high-speed, global control signals (clock, clear, and two output enable signals) for each macrocell and I/O pin .
■ High-performance 3.3-V EEPROM-based programmable logic devices (PLDs) built on second-generation Multiple Array MatriX (MAX) architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability
– MAX 7000AE device in-system programmability (ISP) circuitry compliant with IEEE Std. 1532
– EPM7128A and EPM7256A device ISP circuitry compatible with IEEE Std. 1532
■ Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1
■ Supports JEDEC Jam Standard Test and Programming Language (STAPL) JESD-71
■ Enhanced ISP features – Enhanced ISP algorithm for faster programming (excluding EPM7128A and EPM7256A devices)
■ Additional design entry and simulation support provided by EDIF 2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM), Verilog HDL, VHDL, and other interfaces to popular EDA tools from manufacturers such as Cadence, Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, and VeriBest
– ISP_Done bit to ensure complete programming (excluding EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
■ Pin-compatible with the popular 5.0-V MAX 7000S devices
■ High-density PLDs ranging from 600 to 10,000 usable gates
■ Extended temperature range
Artificial Intelligence
5G Technology
Cloud Computing
Consumer Electronics
Wireless Technology
Industrial Control
Internet of Things
Medical Equipment
Specification | Value |
---|---|
Series | MAX 7000 |
Memory Type | EEPROM |
Number of Macrocells | 64 |
Maximum Operating Frequency | 222.2 MHz |
Delay Time | 4.5 ns |
Number of Programmable I/Os | 68 |
Operating Supply Voltage | 3.3 V |
Maximum Operating Temperature | + 70 C |
Minimum Operating Temperature | 0 C |
Package / Case | FBGA-100 |
Mounting Style | SMD/SMT |
Packaging | Tray |
Supply Voltage - Max | 3.6 V |
Supply Voltage - Min | 3 V |
1+ $30.2563
25+ $23.3851
100+ $17.1546
500+ $16.0715
1000+ $15.1282
11+ $33.3132
20+ $32.8440
30+ $31.9056
60+ $31.2018
110+ $30.0288
550+ $29.3250
1100+ $28.6212
1+ $23.0001
1+ $23.0001
1+ $104.6503
1+ $104.6503
1+ $46.0001
1+ $46.0001
390+ $9.6017
390+ $49.3421
1+ $21.3901
1+ $27.6000
1+ $46.0000
1+ $8.2800
3+ $25.9800
25+ $20.0800
100+ $14.7300
500+ $13.8000
1000+ $12.9900
Support