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FPGAKey Technical Documents
Download DatasheetThe MAX 3000A EPM3256ATC144-10AA devices are low–cost, high–performance devices based on the Altera
MAX architecture. Fabricated with advanced CMOS technology, the EEPROM–based MAX
3000A devices operate with a 3.3-V supply voltage and provide 600 to 10,000
usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up
to 227.3 MHz.
■ High–performance, low–cost CMOS EEPROM–based programmable logic devices
(PLDs) built on a MAX architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built–in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability
– ISP circuitry compliant with IEEE Std. 1532
■ Built–in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990
■ Enhanced ISP features:
– Enhanced ISP algorithm for faster programming
– ISP_Done bit to ensure complete programming
– Pull-up resistor on I/O pins during in–system programming
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Specification | Value |
---|---|
Programmable Type | In System Programmable |
Delay Time tpd(1) Max | 10.0ns |
Voltage Supply - Internal | 3V ~ 3.6V |
Number of Logic Elements/Blocks | 16 |
Number of Macrocells | 256 |
Number of Gates | 5000 |
Number of I/O | 116 |
Operating Temperature | 0℃ ~ 70℃ (TA) |
Mounting Type | Surface Mount |
Package / Case | 144-LQFP |
Supplier Device Package | 144-TQFP (20x20) |
1+ $147.4967
10+ $117.9972
50+ $107.2714
100+ $78.6688
500+ $73.7542
1+ $57.4731
10+ $45.9783
50+ $41.7975
100+ $24.2004
500+ $22.9891
1000+ $22.7097
2500+ $22.4302
5000+ $22.1624
1+ $93.4709
10+ $80.7185
50+ $73.9987
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500+ $43.8472
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2500+ $42.7991
1+ $107.2365
10+ $73.3815
50+ $69.7014
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500+ $36.6849
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2500+ $34.4256
5000+ $34.0063
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1+ $49.4525
1+ $29.5582
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1+ $43.8401
1+ $80.2600
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50+ $63.5400
100+ $38.1200
500+ $37.6500
1000+ $37.1900
2500+ $36.7500
1+ $16.1201
1+ $23.3420
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