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FPGAKey Technical Documents
Download DatasheetThe MAX 3000A EPM3256AT1144-10S devices are low–cost, high–performance devices based on the Altera
MAX architecture. Fabricated with advanced CMOS technology, the EEPROM–based MAX
3000A devices operate with a 3.3-V supply voltage and provide 600 to 10,000
usable gates, ISP, pin-to-pin delays as fast as 4.5 ns, and counter speeds of up
to 227.3 MHz.
■ High–performance, low–cost CMOS EEPROM–based programmable logic devices
(PLDs) built on a MAX architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built–in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with advanced pin-locking capability
– ISP circuitry compliant with IEEE Std. 1532
■ Built–in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990
■ Enhanced ISP features:
– Enhanced ISP algorithm for faster programming
– ISP_Done bit to ensure complete programming
– Pull-up resistor on I/O pins during in–system programming
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Specification | Value |
---|---|
Series | MAX 3000A |
Memory Type | EEPROM |
Number of Macrocells | 256 |
Maximum Operating Frequency | 126.6 MHz |
Delay Time | 7.5 ns |
Number of Programmable I/Os | 161 |
Operating Supply Voltage | 3.3 V |
Maximum Operating Temperature | + 70 C |
Minimum Operating Temperature | 0 C |
Package / Case | FBGA-256 |
Mounting Style | SMD/SMT |
Packaging | Tray |
Supply Voltage - Max | 3.6 V |
Supply Voltage - Min | 3 V |
1+ $147.4967
10+ $117.9972
50+ $107.2714
100+ $78.6688
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1+ $57.4731
10+ $45.9783
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100+ $24.2004
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5000+ $22.1624
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1+ $49.4525
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1000+ $37.1900
2500+ $36.7500
1+ $16.1201
1+ $23.3420
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