EP1AGX50CF484C4

Features

Transceivers within each block are independent and have their own set of dividers. Therefore, each transceiver can operate at different frequencies.

Each block can select from two reference clocks to provide two clock domains that each transceiver can select from.

The key features of Arria GX devices include:

■ Transceiver block features

■ High-speed serial transceiver channels with CDR support up to 3.125 Gbps.

■ Devices available with 4, 8, or 12 high-speed full-duplex serial transceiver channels

■ Support for the following CDR-based bus standards—PCI Express, Gigabit Ethernet, SDI, SerialLite II, XAUI, and Serial RapidIO, along with the ability to develop proprietary, serial-based IP using its Basic mode

■ Individual transmitter and receiver channel power-down capability for reduced power consumption during non-operation

■ 1.2- and 1.5-V pseudo current mode logic (PCML) support on transmitter output buffers

■ Receiver indicator for loss of signal (available only in PCI Express [PIPE] mode)

■ Hot socketing feature for hot plug-in or hot swap and power sequencing support without the use of external devices

■ Dedicated circuitry that is compliant with PIPE, XAUI, Gigabit Ethernet, Serial Digital Interface (SDI), and Serial RapidIO

■ 8B/10B encoder/decoder performs 8-bit to 10-bit encoding and 10-bit to 8-bit decoding

■ Phase compensation FIFO buffer performs clock domain translation between the transceiver block and the logic array

■ Channel aligner compliant with XAUI

■ Main device features:

■ TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers with performance up to 380 MHz

■ Up to 16 global clock networks with up to 32 regional clock networks per device

■ High-speed DSP blocks provide dedicated implementation of multipliers, multiply-accumulate functions, and finite impulse response (FIR) filters

■ Up to four enhanced phase-locked loops (PLLs) per device provide spread spectrum, programmable bandwidth, clock switch-over, and advanced multiplication and phase shifting

■ Support for numerous single-ended and differential I/O standards

■ High-speed source-synchronous differential I/O support on up to 47 channels

■ Support for source-synchronous bus standards, including SPI-4 Phase 2

(POS-PHY Level 4), SFI-4.1, XSBI, UTOPIA IV, NPSI, and CSIX-L1

■ Support for high-speed external memory including DDR and DDR2 SDRAM, and SDR SDRAM

■ Support for multiple intellectual property megafunctions from Altera MegaCore functions and Altera Megafunction Partners Program (AMPPSM)

■ Support for remote configuration updates

FAQ

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• Q: How can I obtain software development tools related to the Altera FPGA platform?
• Quartus Prime Modelsim is the corresponding programming software for FPGA produced by Altera/Intel. The specific choice depends on personal habits and functional requirements to specifically select a more suitable match. You can search and download through the FPGA resource channel.
• Q: Where can I purchase Altera EP1AGX50C Development Boards, Evaluation Boards, or Arria GX FPGA Starter Kit? also provide technical information?
• FPGAkey does not provide development board purchase services for the time being, but customers often consult about ZedBoard, Basys 3 board, TinyFPGA BX, Nexys4-DDR, Terasic DE10-Nano, Digilent Arty S7, etc. If you need relevant technical information, you can submit feedback information, our technicians will contact you soon.
• Q: How to obtain EP1AGX50CF484C4 technical support documents?
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