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Altera MAX 9000 EPLD


The MAX 9000 family of in-system-programmable, high-density, highperformance EPLDs is based on Altera‚Äôs third-generation MAX architecture. Fabricated on an advanced CMOS technology, the EEPROMbased MAX 9000 family provides 6,000 to 12,000 usable gates, pin-to-pin delays as fast as 10 ns, and counter speeds of up to 144 MHz. 

MAX 9000 EPLD Devices

MAX 9000 EPLD Documents

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