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FPGAKey Technical Documents
Download Datasheet• Hot-Swap Compliant I/Os
• Single-Chip Solution
• Nonvolatile
• Live on Power-Up
• No Power-Up/Down Sequence Required for Supply Voltages
• Configurable Weak-Resistor Pull-Up or Pull-Down for Tristated Outputs during Power-Up
• Individual Output Slew Rate Control
• 2.5 V, 3.3 V, and 5.0 V Mixed-Voltage Operation with 5.0V Input Tolerance and 5.0V Drive Strength
• Software Design Support with Microsemi Designer and Libero Integrated Design Environment (IDE) Tools
• Up to 100% Resource Utilization with 100% Pin Locking
• Deterministic Timing
• Unique In-System Diagnostic and Verification Capability with Silicon Explorer II
• Boundary Scan Testing in Compliance with IEEE Standard 1149.1 (JTAG)
• Fuselock Secure Programming Technology Designed to Prevent Reverse Engineering and Design Theft
Artificial Intelligence
5G Technology
Cloud Computing
Consumer Electronics
Wireless Technology
Industrial Control
Internet of Things
Medical Equipment
FPGA eX Family 4K Gates 256 Cells 250MHz 0.22um Technology 2.5V 128-Pin CSP
FPGA eX Family 4K Gates 256 Cells 250MHz 0.22um Technology 2.5V Automotive 128-Pin CSP
FPGA eX Family 4K Gates 256 Cells 250MHz 0.22um Technology 2.5V Automotive 49-Pin CSP
FPGA eX Family 4K Gates 256 Cells 250MHz 0.22um Technology 2.5V 49-Pin CSP
180+ $35.0848
180+ $35.0848
180+ $35.0848
160+ $32.481
160+ $32.481
180+ $35.0848
180+ $35.0848
180+ $35.0848
180+ $23.1278
1+ $50.0300
25+ $29.0100
100+ $18.1300
500+ $15.8200
1000+ $14.5000
2500+ $13.1900
1+ $50.0300
25+ $29.0100
100+ $18.1300
500+ $15.8200
1000+ $14.5000
2500+ $13.1900
1+ $50.0300
25+ $29.0100
100+ $18.1300
500+ $15.8200
1000+ $14.5000
2500+ $13.1900
1+ $50.0300
25+ $29.0100
100+ $18.1300
500+ $15.8200
1000+ $14.5000
2500+ $13.1900
1+ $50.0300
25+ $29.0100
100+ $18.1300
500+ $15.8200
1000+ $14.5000
2500+ $13.1900
1+ $50.0300
25+ $29.0100
100+ $18.1300
500+ $15.8200
1000+ $14.5000
2500+ $13.1900
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