The Speedster22i device is an FPGA that includes built-in end-to-end, hard-core IP interface protocol functions and is primarily geared toward communications and test applications. Speedster22i's hard IP includes a complete I/O protocol stack, which can be used for 10/40/100G, Interlaken, PCI Express gen1/2/3, and memory controllers for 2.133Gbps DDR3. In other FPGAs, these functions are implemented by programmable arrays, making timing closure challenging and requiring up to 500,000 equivalent look-up tables (LUTs) in the programmable array. This adds a lot of cost and power to traditional FPGA designs, and they are all basic connections in Speedster FPGA products. In addition, the embedded hard-core IP eliminates the soft-core IP costs associated with procurement, integration, and testing of these functions.
In addition, Achronix Semiconductor has a complete set of ACE (Achronix CAD Environment) development software that provides integration, place and route, simulation, static timing analysis and other functions to provide customers with an efficient development platform.